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publication number s29gl-m_00 revision b amendment 8 issue date february 7, 2007 s29gl-m mirrorbit tm flash family s29gl256m, s29gl128m, s29gl064m, s29gl032m 256 megabit, 128 megabit, 64 megabit, and 32 megabit, 3.0 volt-only page mode flash memory featuring 0.23 m mirrorbit process technology data sheet this product family has been retired and is not recommended for designs. for new and current designs, s29gl0 32a, s29gl064a, s29gl128p, and s29gl256p supersede s29gl032m , s29gl064m, s29gl128m, and s29gl256m respectively. these are the factory-recommended migration paths. please refer to the s29gl-a and s29gl-p datasheets for specifications and ordering information. availability of this document is retained for reference and historical purposes only. notice to readers: this document states the current technical specifications regarding the spansion product(s) described herein. spansion inc. deems the products to have been in sufficient pr oduction volume such that subsequent versions of this document are not expected to change. however, typographical or specification corrections, or modifications to the valid combinations offered may occur.
ii s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet notice on data sheet designations spansion inc. issues data sheets with advance in formation or preliminary designations to advise readers of product information or intended specif ications throughout the product life cycle, in - cluding development, qualification, initial production, and full production. in all cases, however, readers are encouraged to verify that they have the latest information before finalizing their de - sign. the following descriptions of spansion data sheet designations are presented here to high - light their presence and definitions. advance information the advance information designation indicates that spansion inc. is developing one or more specific products, but has not committed any desi gn to production. information presented in a document with this designation is likely to ch ange, and in some cases, development on the prod - uct may discontinue. spansion inc. therefore plac es the following conditions upon advance infor - mation content: ?this document contains information on one or more products under development at spansion inc. the information is intended to help you evaluate this product. do not design in this product without con- tacting the factory. spansion inc. reserves the right to change or discontinue work on this proposed product without notice.? preliminary the preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. this designation covers several aspects of the prod - uct life cycle, including product qualification, in itial production, and the su bsequent phases in the manufacturing process that occur before full production is achi eved. changes to the technical specifications presented in a preliminary docume nt should be expected while keeping these as - pects of production under consid eration. spansion places the fo llowing conditions upon prelimi - nary content: ?this document states the current technical specific ations regarding the spansion product(s) described herein. the preliminary status of this document indi cates that product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifica- tions due to changes in technical specifications.? combination some data sheets will contain a combination of pr oducts with different designations (advance in - formation, preliminary, or full pr oduction). this type of document will distinguish these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with dc charac teristics table and ac erase an d program table (in the table notes). the disclaimer on the first page refe rs the reader to the notice on this page. full production (no desi gnation on document) when a product has been in produc tion for a period of time such th at no changes or only nominal changes are expected, the preliminary designatio n is removed from the data sheet. nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or v io range. changes may also include those needed to clarify a descript ion or to correct a typographical error or incor - rect specification. spansion inc. applies the follo wing conditions to documents in this category: ?this document states the current technical specific ations regarding the spansion product(s) described herein. spansion inc. deems the products to have been in sufficient production volume such that sub- sequent versions of this document are not expected to change. however, typographical or specification corrections, or modifications to the valid combinations offered may occur.? questions regarding these docume nt designations may be directed to your local sales office.
publication number s29gl-m_00 revision b amendment 8 issue date february 7, 2007 this product family has been retired an d is not recommended for designs. for new and current designs, s29gl032a, s29gl064a, s29gl128p, and s29gl256p supersede s29gl032 m, s29gl064m, s29g l128m, and s29gl256m respectively. these are the factory-recommended migratio n paths. please refer to the s29gl-a an d s29gl-p datasheets for specifications and ordering information. availability of this document is retained for re ference and historical purposes only. distinctive characteristics architectural advantages ? single power supply operation ? 3 volt read, erase, and program operations ? manufactured on 0.23 m mirrorbit process technology ? secured silicon sector region ? 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random electronic serial number, accessible through a command sequence ? may be programmed and locked at the factory or by the customer ? flexible sector architecture ? 256 mb: 512 32-kword (64 kbyte) sectors ? 128 mb: 256 32-kword (64 kbyte) sectors ? 64 mb (uniform sector models): 128 32-kword (64-kbyte) sectors or 128 32 kword sectors ? 64 mb (boot sector models): 127 32-kword (64-kbyte) sectors + 8 4kword (8kbyte) boot sectors ? 32 mb (uniform sector models): 64 32-kword (64-kbyte) sectors of 64 32-kword sectors ? 32 mb (boot sector models): 63 32-kword (64 kbyte) sectors + 8 4-kword (8-kbyte) boot sectors ? compatibility with jedec standards ? provides pinout and software compatibility for single- power supply flash, and su perior inadvertent write protection ? 100,000 erase cycles typical per sector ? 20-year data retention typical performance characteristics ? high performance ? 90 ns access time (128 mb, 64 mb, 32 mb), 100 ns access time (256 mb) ? 4-word/8-byte page read buffer ? 25 ns page read times (128 mb, 64 mb, 32 mb) ? 30 ns page read times (256 mb) ? 16-word/32-byte write buffer ? 16-word/32-byte write buffer reduces overall programming time for multiple-word updates ? low power consumption (typ ical values at 3.0 v, 5 mhz) ? 18 ma typical active read current (64 mb, 32 mb) ? 25 ma typical active read current (256 mb, 128 mb) ? 50 ma typical erase/program current ? 1 a typical standby mode current ? package options ?40-pin tsop ?48-pin tsop ?56-pin tsop ? 64-ball fortified bga ? 48-ball fine-pitch bga ? 63-ball fine-pitch bga software & hardware features ? software features ? program suspend & resu me: read other sectors before programming operation is completed ? erase suspend & resume : read/program other sectors before an erase operation is completed ? data# polling & toggle bits provide status ? cfi (common flash interface) compliant: allows host system to identify and ac commodate multiple flash devices ? unlock bypass program command reduces overall multiple-word programming time ? hardware features ? sector group protection: ha rdware-level method of preventing write operations within a sector group ? temporary sector unprotect: v id -level method of charging code in locked sectors ? wp#/acc input accelerates programming time (when high voltage is applie d) for greater throughput during system production. protects first or last sector regardless of sector protec tion settings on uniform sector models ? hardware reset input (reset#) resets device ? ready/busy# output (ry/ by#) detects program or erase cycle completion s29gl-m mirrorbit tm flash family s29gl256m, s29gl128m, s29gl064m, s29gl032m 256 megabit, 128 megabit, 64 megabit, and 32 megabit, 3.0 volt-only page mode flash memory featuring 0.23 m mirrorbit process technology data sheet
2s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet general description the s29gl256/128/064/032m family of devices are 3.0 v single power fl ash memory manufac - tured using 0.23 m mirrorbit technology. the s29gl256m is a 256?mbit, organized as 16,777,216 words or 33,554,432 bytes. the s29gl128m is a 128 mbit, organized as 8,388,608 words or 16,777,216 bytes. the s29gl064m is a 64 mbit, or ganized as 4,194,304 words or 8,388,608 bytes. the s29gl032m is a 32 mbit, organized as 2,097,152 words or 4,194,304 bytes. depending on the model number, the devices have an 8-bit wide data bus only, 16-bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the byte# input. the devices can be programmed either in the host system or in standard eprom programmers. access times as fast as 90 ns (s29gl128m, s29gl064m, s29gl032m) or 100 ns (s29gl256m) are available. note that each access time has a specific operating voltage range (v cc ) as specified in product selector guide and the ordering information sections starting on page 16 . package offer - ings include 40-pin tsop, 48-pin tsop, 56-pin tsop, 48-ball fine-pitch bga, 63-ball fine-pitch bga and 64-ball fortified bga, depending on model number. each device has separate chip enable (ce#), write enable (we#) and output enable (oe#) controls. each device requires only a single 3.0 volt power supply for both read and write functions. in addition to a v cc input, a high-voltage accelerated program (acc) feature provides shorter pro - gramming times through increased current on the wp#/acc input. this feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired. the device is entirely command set compatible with the jedec single-power-supply flash stan - dard . commands are written to the device using standard microprocessor write timing. write cycles also internally latch addresses and data needed for the programming and erase operations. the sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. th e device is fully erased when shipped from the factory. device programming and erasure are initiated through command sequences. once a program or erase operation starts, the host system need only poll the dq7 (data# polling) or dq6 (toggle) sta - tus bits or monitor the ready/busy# (ry/by#) output to determine whether the operation is complete. to facilitate programming, an unlock bypass mode reduces command sequence over - head by requiring only two write cycles to program data instead of four. hardware data protection measures include a low v cc detector that automatically inhibits write operations during power transitions. the hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. this can be achieved in-system or via programming equipment. the erase suspend/erase resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. the program suspend/program resume feature enables the host system to pause a program op - eration in a given sector to read any other se ctor and then complete the program operation. the hardware reset# pin terminates any operation in prog ress and resets the device, after which it is then ready for a new operation. the reset# pin may be tied to the system reset circuitry. a system reset would thus also reset the device, enabling the host system to read boot-up firmware from the flash memory device. the device reduces power consumption in the standby mode when it detects specific voltage levels on ce# and reset#, or when addresses are stable for a specified period of time. the write protect (wp#) feature protects the first or last sector by asserting a logic low on the wp#/acc pin or wp# pin, depending on model number. the protected sector is still protected even during accelerated programming. the secured silicon sector provides a 128-word/256-byte area for code or data that can be per - manently protected. once this sector is protected, no further changes within the sector can occur. spansion mirrorbit flash technology combines year s of flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. the device electrically erases all bits within a sector simultaneously via hot-ho le assisted erase. the data is programmed using hot electron injection.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 3 data sheet table of contents distinctive characteristics . . . . . . . . . . . . . . . . . . . . 1 general description . . . . . . . . . . . . . . . . . . . . . . . . 2 product selector guide . . . . . . . . . . . . . . . . . . . . . .5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 connection diagrams . . . . . . . . . . . . . . . . . . . . . . .6 for s29gl064m (model r0) only ....................................................................7 for s29gl064m (model r0) only .................................................................. 10 for s29gl032m (model r0) only .................................................................. 12 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 s29gl064m (models r1, r2, r8, r9) ............................................................ 14 s29gl064m (models r3, r4) .......................................................................... 14 s29gl064m (model r5) .....................................................................................15 s29gl064m (model r6, r7) .............................................................................15 s29gl128m .............................................................................................................15 ordering information: s29gl032m . . . . . . . . . . . . 16 s29gl032m standard products ...................................................................... 16 table 1. s29gl032m ordering options ................................. 17 ordering information: s29gl064m . . . . . . . . . . . 18 s29gl064m standard products ...................................................................... 18 table 2. s29gl064m ordering options ................................. 19 ordering information: s29gl128m . . . . . . . . . . . .20 table 3. s29gl128m ordering options ................................. 20 ordering information: s29gl256m . . . . . . . . . . . . 21 table 4. s29gl256m ordering options ................................. 21 device bus operations . . . . . . . . . . . . . . . . . . . . . . 22 table 5. device bus operations ........................................... 22 word/byte configuration ............................................................................... 22 requirements for reading array data ........................................................ 22 page mode read ..................................................................................................23 writing commands/command sequences .................................................23 write buffer .....................................................................................................23 accelerated program operation ...............................................................23 autoselect functions .....................................................................................23 standby mode ...................................................................................................... 24 automatic sleep mode ..................................................................................... 24 reset#: hardware reset pin ........................................................................ 24 output disable mode ....................................................................................... 24 table 6. s29gl032m (model r0) sector addresses ................ 25 table 7. s29gl032m (models r1, r2) sector addresses ......... 26 table 8. s29gl032m (model r3) top boot sector addresses ................................................. 27 table 9. s29gl032m (model r4) bottom boot sector addresses ............................................ 28 table 11. s29gl064m (models r1, r2, r8, r9) sector addresses .............................................................. 30 table 14. s29gl064m (model r5, r6, r7) sector addresses ... 37 table 16. s29gl256m sector address table ......................... 41 autoselect mode .................................................................................................47 table 17. autoselect codes, (high voltage method) ............... 47 table 18. s29gl032m (model r0) sector group protection/ unprotection addresses ...................................................... 48 table 19. s29gl032m (models r1, r2) sector group protection/ unprotection addresses ...................................................... 48 table 20. s29gl032m (model r3) sector group protection/ unprotection address table ................................................ 48 table 21. s29gl032m (model r4) sector group protection/ unprotection address table ................................................ 49 table 22. s29gl064m (model 00 ) sector group protection/ unprotection address table ................................................. 49 table 23. s29gl064m (models r1, r2, r8, r9) sector group protection/unprotection addresses ....................................... 49 table 24. s29gl064m (model r3 ) sector group protection/ unprotection address table ................................................. 50 table 26. s29gl064m (model r5 ) sector group protection/ unprotection addresses ...................................................... 51 table 27. s29gl064m (models r6, r7) sector group protection/ unprotection address ......................................................... 51 table 28. s29gl128m sector group protection/unprotection addresses ......................................................................... 51 table 29. s29gl256m sector group protection/unprotection addresses ......................................................................... 52 temporary sector group unprotect .......................................................... 53 figure 1. temporary se ctor group unprotect operation.......... 53 figure 2. in-system sector grou p protect/sector group unprotect algorithms........................................................................ 54 secured silicon sector flash memory region ........................................... 55 write protect (wp#) ....................................................................................... 56 hardware data protection ............................................................................. 56 low vcc write inhibit ................................................................................ 56 write pulse ?glitch? protection ............................................................... 56 logical inhibit ................................................................................................... 56 power-up write inhibit ............................................................................... 56 common flash memory interface (cfi) . . . . . . . 57 table 30. cfi query identification string .............................. 57 table 31. system interface string ........................................ 57 table 32. device geometry definition ................................... 58 table 33. primary vendor-specific extended query ................ 59 command definitions . . . . . . . . . . . . . . . . . . . . . . 60 reading array data ...........................................................................................60 reset command .................................................................................................60 autoselect command sequence ..................................................................... 61 enter/exit secured silicon sector command sequence .......................... 61 word program command sequence ....................................................... 61 unlock bypass command sequence ........................................................ 62 write buffer programming .......................................................................... 62 accelerated program .................................................................................... 63 figure 3. write buffer programming operation ...................... 64 figure 4. program operation ............................................... 65 program suspend/program resume command sequence .................... 65 figure 5. program suspend/program resume........................ 66 chip erase command sequence ................................................................... 66 sector erase command sequence ................................................................ 66 figure 6. erase operation ................................................... 67 erase suspend/erase resume commands ..................................................68 command definitions ....................................................................................... 69 table 34. command definitions( x16 mode, byte# = v ih ) ...... 69 table 35. command definitions (x8 mode, byte# = v il ) ........ 70 write operation status .................................................................................... 71 dq7: data# polling ............................................................................................. 71 figure 7. data# polling algorithm ........................................ 72 ry/by#: ready/busy# ....................................................................................... 72 dq6: toggle bit i ............................................................................................... 72 figure 8. toggle bit algorithm ............................................. 74 dq2: toggle bit ii .............................................................................................. 74 dq5: exceeded timing limits ........................................................................ 75 dq3: sector erase timer ................................................................................ 75 dq1: write-to-buffer abort ........................................................................... 75 table 36. write operation status ......................................... 76
4s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet absolute maximum ratings . . . . . . . . . . . . . . . . . . 77 figure 9. maximum negative overshoot waveform ................. 77 figure 10. maximum positive overshoot waveform................. 77 operating ranges . . . . . . . . . . . . . . . . . . . . . . . . . .77 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . .78 cmos compatible ............................................................................................ 78 test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 figure 11. test setup ......................................................... 79 table 37. test specifications ............................................... 79 key to switching waveforms . . . . . . . . . . . . . . . .79 figure 12. input waveforms and measurement levels............. 79 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . .80 read-only operations?s29gl256m only ............................................... 80 read-only operations?s29gl128m only ................................................ 80 read-only operations?s29gl064m only ............................................... 81 read-only operations?s29gl032m only ................................................ 82 figure 13. read operation timings ....................................... 82 figure 14. page read timings .............................................. 83 hardware reset (reset#) ...............................................................................83 figure 15. reset timings..................................................... 84 erase and program operations?s29gl256m only ............................... 85 erase and program operations?s29gl128m only ............................... 86 erase and program operations?s29gl064m only .............................. 87 erase and program operations?s29gl032m only .............................. 88 figure 16. program operation timings .................................. 89 figure 17. accelerated program timing diagram .................... 89 figure 18. chip/sector erase operation timings ..................... 90 figure 19. data# polling timings (during embedded algorithms) ............................................ 90 figure 20. toggle bit timings (during embedded algorithms) .. 91 figure 21. dq2 vs. dq6 ...................................................... 91 temporary sector unprotect ......................................................................... 91 figure 22. temporary sector gr oup unprotect timing diagram 92 figure 23. sector gr oup protect and unprotect timing diagram 92 alternate ce# controlled erase and program operations? s29gl256m .......................................................................................................... 93 alternate ce# controlled erase and program operations? s29gl128m ........................................................................................................... 94 alternate ce# controlled erase and program operations? s29gl064m .......................................................................................................... 95 alternate ce# controlled erase and program operations? s29gl032m .......................................................................................................... 96 figure 24. alternate ce# controlled write (erase/ program) operation timings ............................................... 97 erase and programming performance . . . . . . . . . 98 tsop pin and bga package capacitance . . . . . .98 physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . 99 ts040?40-pin standard thin small outline package (tsop) ............ 99 tsr040?40-pin standard and reverse thin small outline package (tsop) ................................................................................................................. 100 ts048?48-pin standard and reverse thin small outline package (tsop) ...................................................................................................................101 tsr048?48-pin standard and reverse thin small outline package (tsop) ..................................................................................................................102 ts056/tsr056?56-pin standard and reverse thin small outline pack- age (tsop) ..........................................................................................................103 laa064?64-ball fortified ball grid array (fbga) ..............................104 lac064?64-pin 18 x 12 mm package .........................................................105 fba048?48-pin 6.15 x 8.15 mm package ...................................................106 fbc048?48-pin 8 x 9 mm package ............................................................107 fbe063?63-pin 12 x 11 mm package ........................................................... 108 fpt-48p-m19 ...................................................................................................... 109 fpt-56p-m01 ....................................................................................................... 109 revision summary . . . . . . . . . . . . . . . . . . . . . . . . 110
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 5 data sheet product selector guide block diagram ** a max : gl256m = a23, gl128m = a22, gl064m = a21 (g l064m-00 = a22), gl032m = a20 (gl032m-00 = a21) part number s29gl256m s29gl128m s29gl064m s29gl032m speed option 10 11 90 10 90 10 11 90 10 11 max. access time (ns) 100 110 90 100 90 100 110 90 100 110 max. ce# access time (ns) 100 110 90 100 90 100 110 90 100 110 max. page access time (ns) 30 30 25 30 25 30 30 25 30 30 max. oe# access time (ns) 30 30 25 30 25 30 30 25 30 30 input/output buffers x-decoder y-decoder chip enable output enable logic erase voltage generator pgm voltage generator timer v cc detector state control command register v cc v ss we# wp#/acc byte# ce# oe# stb stb dq15?dq0 (a-1) sector switches ry/by# reset# data latch y-gating cell matrix address latch a max **?a0
6s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet connection diagrams notes: 1. pin 13 is nc on s29gl032m. 2. pin 9 is a21, pin 13 is acc, pin 14 is wp#, pin 15 is a19, and pin 47 is v io on s29gl064m (models r6, r7). 1 16 2 3 4 5 6 7 8 17 18 19 20 9 10 11 12 13 14 15 40 25 39 38 37 36 35 34 33 32 31 30 29 28 27 26 24 23 22 21 a16 a5 a15 a14 a13 a12 a11 a9 a8 we# reset# acc ry/by# a18 a7 a6 a4 a3 a2 a1 a17 dq0 v ss a20 a19 a10 dq7 dq6 dq5 oe# v ss ce# a0 dq4 v cc v io a21 dq3 dq2 dq1 40-pin standard tsop 1 16 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 48 33 47 46 45 44 43 42 41 40 39 38 37 36 35 34 25 32 31 30 29 28 27 26 a15 a18 a14 a13 a12 a11 a10 a9 a8 a19 2 a20 we# reset# a21 1,2 wp#/acc 2 ry/by# 2 a1 a17 a7 a6 a5 a4 a3 a2 a16 dq2 byte# 2 v ss dq15/a-1 dq7 dq14 dq6 dq13 dq9 dq1 dq8 dq0 oe# v ss ce# a0 dq5 dq12 dq4 v cc dq11 dq3 dq10 48-pin standard tsop
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 7 data sheet for s29gl064m (model r0) only notes: 1. pin 1 is nc on s29gl128m, 29gl064m, and s29gl032m. 2. pin 2 is nc on s29gl064m, and s29gl032m. 3. pin 15 is nc on s29gl032m. 1 16 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 40 25 39 38 37 36 35 34 33 32 31 48 47 46 45 44 43 42 41 30 29 28 27 26 a16 a5 a15 nc a22 a14 a13 a12 a11 a9 a8 we# reset# acc ry/by# a18 a7 a6 a4 a3 a2 a1 nc nc a17 dq0 v ss nc nc nc nc a20 a19 a10 dq7 dq6 dq5 oe# v ss ce# a0 dq4 v cc v io a21 dq3 dq2 dq1 48-pin standard tsop 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 a23 1 a22 2 a15 a14 a13 a12 a11 a10 a9 a8 a19 a20 we# reset# a21 3 wp#/acc ry/by# a18 a17 a7 a6 a5 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 nc nc a16 byte# v ss dq15/a-1 dq7 dq14 dq6 dq13 dq5 dq12 dq4 v cc dq11 dq3 dq10 dq2 dq9 dq1 dq8 dq0 23 24 25 26 27 28 a4 a3 a2 a1 nc nc 34 33 32 31 30 29 oe# v ss ce# a0 nc v io 56-pin standard tsop
8s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet notes: 1. ball c5 is nc on s29gl032m. 2. ball b8 is nc on s29gl064m and s29gl032m. 3. ball c8 is nc on s29gl128m, s29gl064m and s29gl032m. 4. ball d8 and ball f1 are nc on s29gl064m (models r3, r4) and s29gl032m (models r3, r4, r5, r6). 5. ball f7 is nc on s29gl064m (model r5). a2 c2 d2 e2 f2 g2 h2 a3 c3 d3 e3 f3 g3 h3 a4 c4 d4 e4 f4 g4 h4 a5 c5 d5 e5 f5 g5 h5 a6 c6 d6 e6 f6 g6 h6 a7 c7 d7 e7 f7 g7 h7 dq15/a-1 v ss byte# 5 a16 a15 a14 a12 a13 dq13 dq6 dq14 dq7 a11 a10 a8 a9 v cc dq4 dq12 dq5 a19 a21 1 reset# we# dq11 dq3 dq10 dq2 a20 a18 wp#/acc ry/by# dq9 dq1 dq8 dq0 a5 a6 a17 a7 oe# v ss ce# a0 a1 a2 a4 a3 a1 c1 d1 e1 f1 g1 h1 nc nc v io 4 nc nc nc nc nc a8 c8 b2 b3 b4 b5 b6 b7 b1 b8 d8 e8 f8 g8 h8 nc nc nc v ss v io 4 a23 3 a22 2 nc 64-ball fortified bga top view, balls facing down
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 9 data sheet note: ball h7 is v io on s29gl064m (model r5). special package handling instructions special handling is required for flash memory products in molded packages (tsop and bga). the package and/or data inte grity may be compromised if the pa ckage body is exposed to tempera - tures above 150 c for prolonged periods of time. c2 d2 e2 f2 g2 h2 j2 k2 c3 d3 e3 f3 g3 h3 j3 k3 c4 d4 e4 f4 g4 h4 j4 k4 c5 d5 e5 f5 g5 h5 j5 k5 c6 d6 e6 f6 g6 h6 j6 k6 c7 d7 a7 b7 a8 b8 a1 b1 a2 e7 f7 g7 h7 j7 k7 l7 l8 m7 m8 l1 l2 m1 m2 nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* nc* dq15/a - 1 v ss byte# 1 a16 a15 a14 a12 a13 dq13 dq6 dq14 dq7 a11 a10 a8 a9 v cc dq4 dq12 dq5 a19 a21 reset# we# dq11 dq3 dq10 dq2 a20 a18 wp#/acc ry/by# dq9 dq1 dq8 dq0 a5 a6 a17 a7 oe# v ss ce# a0 a1 a2 a4 a3 * balls are shorted together via the substrate but not connected to the die. 63-ball fine-pitch bga top view, balls facing down
10 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet for s29gl064m (model r0) only special package handling instructions special handling is required for flash memory products in molded packages (tsop and bga). the package and/or data integrity may be compromise d if the package body is exposed to tempera - tures above 150c for prolonged periods of time. c2 d2 c3 d3 e2 e3 f2 f3 g2 g3 h2 h3 j2 j3 k2 a3 a4 a2 a1 a0 ce# oe# v ss a7 a18 a6 a5 dq0 nc nc dq1 ry/by# acc nc nc dq2 dq3 v io a21 we# reset# a22 nc dq5 nc v cc dq4 a9 a8 a11 a12 a19 a10 dq6 dq7 a14 a13 a15 a16 a17 nc a20 v ss c4 d4 e4 a1 b1 a2 nc* nc* nc* f4 g4 h4 j4 k4 c5 d5 e5 f5 g5 h5 j5 k5 c6 d6 e6 f6 g6 h6 j6 k6 c7 d7 e7 nc* nc* nc* nc* a7 b7 a8 b8 f7 g7 h7 j7 k7 nc* nc* nc* nc* l7 m7 l8 m8 k3 l1 l2 m1 nc* nc* nc* nc* m2 * balls are shorted together via the substrate but not connected to the die. 63-ball fine-pitch bga top view, balls facing down
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 11 data sheet a1 b1 c1 d1 e1 f1 g1 h1 a2 b2 c2 d2 e2 f2 g2 h2 a3 b3 c3 d3 e3 f3 g3 h3 a4 b4 c4 d4 e4 f4 g4 h4 a5 b5 c5 d5 e5 f5 g5 h5 a6 b6 c6 d6 e6 f6 g6 h6 dq15/a-1 v ss byte# a16 a15 a14 a12 a13 dq13 dq6 dq14 dq7 a11 a10 a8 a9 v cc dq4 dq12 dq5 a19 nc reset# we# dq11 dq3 dq10 dq2 a20 a18 wp#/acc ry/by# dq9 dq1 dq8 dq0 a5 a6 a17 a7 oe# v ss ce# a0 a1 a2 a4 a3 48-ball fine-pitch bga top view, balls facing down
12 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet for s29gl032m (model r0) only special package handling instructions special handling is required for flash memory products in moulded packages (tsop and bga). the package and/or data integrity may be compromised if the package body is exposed to tem - peratures above 150c for pr olonged periods of time. a1 b1 a2 b2 c1 c2 d1 d2 e1 e2 f1 f2 g1 g2 h1 a14 a13 a15 a16 a17 nc a20 v ss a9 a8 a11 a12 a19 a10 d6 d7 we# reset# nc nc d5 nc v cc d4 ry/by# acc nc nc d2 d3 v io a21 a7 a18 a6 a5 d0 nc nc d1 a3 a4 a2 a1 a0 ce# oe# v ss a3 b3 c3 d3 e3 f3 g3 h3 a4 b4 c4 d4 e4 f4 g4 h4 a5 b5 c5 d5 e5 f5 g5 h5 a6 b6 c6 d6 e6 f6 g6 h6 h2 48-ball fine-pitch bga top view, balls facing down
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 13 data sheet pin description a23?a0 = 24 address inputs a22?a0 = 23 address inputs a21?a0 = 22 address inputs a20?a0 = 21 address inputs dq7?dq0 = 8 data inputs/outputs dq14?dq0 = 15 data inputs/outputs dq15/a-1 = dq15 (data input/output, word mode), a-1 (lsb address input, byte mode) ce# = chip enable input oe# = output enable input we# = write enable input wp#/acc = hardware write protect input/programming acceleration input acc = acceleration input wp# = hardware write protect input reset# = hardware reset pin input ry/by# = ready/busy output byte# = selects 8-bit or 16-bit mode v cc = 3.0 volt-only single power supply (see product selector guide for speed options and voltage supply tolerances) v ss = device ground nc = pin not connected internally v io = output buffer power
14 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet logic symbols s29gl032m (model r0) s29gl032m (models r1, r2) s29gl032m (models r3, r4) s29gl064m (model r0) s29gl064m (models r1, r2, r8, r9) s29gl064m (models r3, r4) 22 8 dq7?dq0 a21?a0 ce# oe# we# reset# ry/by# acc v io 21 16 or 8 dq15?dq0 (a-1) a20?a0 ce# oe# we# reset# ry/by# wp#/acc byte# v io 21 16 or 8 dq15?dq0 (a-1) a20?a0 ce# oe# we# reset# ry/by# wp#/acc byte# 23 8 dq7?dq0 a22?a0 ce# oe# we# reset# ry/by# acc v io 22 16 or 8 dq15?dq0 (a-1) a21?a0 ce# oe# we# reset# ry/by# wp#/acc byte# v io 22 16 or 8 dq15?dq0 (a-1) a21?a0 ce# oe# we# reset# ry/by# wp#/acc byte#
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 15 data sheet s29gl064m (model r5) s29gl064m (model r6, r7) s29gl128m s29gl256m logic symbols 22 16 dq15?dq0 a21?a0 ce# oe# we# reset# ry/by# acc v io 22 16 dq15?dq0 a21?a0 ce# oe# we# reset# acc wp# v io 23 16 or 8 dq15?dq0 (a-1) a22?a0 ce# oe# we# reset# ry/by# wp#/acc byte# v io 24 16 or 8 dq15?dq0 (a-1) a23?a0 ce# oe# we# reset# ry/by# wp#/acc byte# v io
16 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ordering information: s29gl032m s29gl032m standard products standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: this product has been retired and is not recommended for designs. for new and current designs, s29gl032a supersedes s29gl032m, and is the factory-recommended migration path. please refer to the s29g l-a datasheet for specificatio ns and ordering information. s29gl032m 10 t a i r1 0 packing type 0= tray 2 = 7? tape and reel 3 = 13? tape and reel model number r0 = x8, v cc =3.0-3.6v, uniform sector device r1 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il r2 = x8/x16, v cc =3.0-3.6v, uniform sector device, lowest address sector protected when wp#/acc=v il r3 = x8/x16, v cc =3.0-3.6v, top boot sector device, top two address sectors protected when wp#/acc=v il r4 = x8/x16, v cc =3.0-3.6v, bottom boot se ctor device, bottom two address sectors protected when wp#/acc=v il temperature range i = industrial (?40 c to +85 c) c = commercial (0 c to +70 c) package material set a= standard f = pb-free b= standard c = pb-free package type t = thin small outline package (tsop) standard pinout b = fine-pitch ball-grid array package f = fortified ball-grid array package speed option see product selector guide and valid combinations device number/description s29gl032m 32 megabit page-mode flash memory manufactured using 0.23 m mirrorbit? process technology, 3.0 volt-only read, program, and erase
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 17 data sheet notes: 1. type 0 is standard. specify others as required: tsops can be pack ed in types 0 and 3; bgas can be packed in types 0, 2, or 3. 2. this package is recommended for new designs using tsops. 3. tsop package marking omits packing type designator from the ordering part number. 4. bga package marking omits leading ?s29? and packing type designator from the ordering part number. 5. 100% matte sn is used for pb-free tsop plating. 6. snbi is used for pb-free tsop plating. valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. ta b l e 1 . s29gl032m ordering options s29gl032m valid combinations package description (notes) device number speed option package, material, & temperature range model number packing type s29gl032m 90 tac,tfc r0 0,2,3 ( note 1 ) ts040 ( 2 , 3 , 5 ) tsop bac,bfc fbc048 ( 4 ) fine-pitch bga tac,tfc r1,r2 ts056 ( 2 , 3 , 5 ) tsop fac,ffc laa064 ( 4 ) fortified bga tac,tfc r3,r4 ts048 ( 2 , 3 , 5 ) tsop bac,bfc fbc048 ( 4 ) fine-pitch bga fac,ffc laa064 ( 4 ) fortified bga 90, 10, 11 tai,tfi r0 ts040 ( 2 , 3 , 5 ) tsop bai,bfi fbc048 ( 4 ) fine-pitch bga tai,tfi r1,r2 ts056 ( 2 , 3 , 5 ) tsop fai,ffi laa064 ( 4 ) fortified bga tai,tfi r3,r4 ts048 ( 2 , 3 , 5 ) tsop bai,bfi fbc048 ( 4 ) fine-pitch bga fai,ffi laa064 ( 4 ) fortified bga tbi,tci fpt-48p-m19 ( 3 , 6 ) tsop
18 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ordering information: s29gl064m s29gl064m standard products standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: this product has been retired and is not recommended for designs. for new and current designs, s29gl064a supersedes s29gl064m, and is the factory-recommended migration path. please refer to the s29g l-a datasheet for specificatio ns and ordering information. s29gl064m 90 t a i r1 0 packing type 0 = tray 2 = 7? tape and reel 3 = 13? tape and reel model number r0 = x8, v cc =3.0-3.6v, uniform sector device r1 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il r2 = x8/x16, v cc =3.0-3.6v, uniform sector device, lowest address sector protected when wp#/acc=v il r3 = x8/x16, v cc =3.0-3.6v, top boot sector device, top two address sectors protected when wp#/acc=v il r4 = x8/x16, v cc =3.0-3.6v, bottom boot sector device, bottom two address sectors protected when wp#/acc=v il r5 = x16, v cc =3.0-3.6v, uniform sector device r6 = x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#=v il r7 = x16, v cc =3.0-3.6v, uniform sector de vice, lowest address sector protected when wp#=v il r8 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il , fpt-56p-m01 package only r9 = x8/x16, v cc =3.0-3.6v, uniform sector device, lowest address sector protected when wp#/acc=v il , fpt-56p-m01 package only temperature range i = industrial (?40 c to +85 c) package material set a= standard f= pb-free b= standard c= pb-free d= pb-free package type t = thin small outline package (tsop) standard pinout b = fine-pitch ball-grid array package f = fortified ball-grid array package speed option see product selector guide and valid combinations device number/description s29gl064m 64 megabit page-mode flash memory manufactured using 0.23 um mirrorbit tm process technology, 3.0 volt-only read, program, and erase
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 19 data sheet notes: 1. type 0 is standard. specify others as required: tsops can be pack ed in types 0 and 3; bgas can be packed in types 0, 2, or 3. 2. this package is recommended for new designs using tsops. 3. tsop package marking omits packing type designator from the ordering part number. 4. bga package marking omits leading ?s29? and packing type designator from the ordering part number. 5. 100% matte sn is used for pb-free tsop plating. 6. snbi is used for pb-free tsop plating. valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. ta b l e 2 . s29gl064m ordering options s29gl064m valid combinations package description (notes) device number speed option package, material, & temperature range model number packing type s29gl064m 90, 10, 11 tai, tfi r0,r3,r4,r6,r7 0,2,3 ( note 1 ) ts048 ( 2 , 3 , 5 ) tsop r1,r2 ts056 ( 2 , 3 , 5 ) tbi, tci r2,r7 fpt-48p-m19 ( 3 , 6 ) tai, tdi r9 fpt-56p-m01 ( 3 , 6 ) bai, bfi r0,r3,r4,r5 fbe063 ( 4 , 6 ) fine-pitch bga fai, ffi r1,r2,r3,r4,r5 laa064 ( 4 ) fortified bga
20 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ordering information: s29gl128m standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: notes: 1. type 0 is standard. specify others as required: tsops can be pack ed in types 0 and 3; bgas can be packed in types 0, 2, or 3. 2. this package is recommended for new designs using tsops. 3. tsop package marking omits packing type designator from the ordering part number. 4. bga package marking omits leading ?s29? and packing type designator from the ordering part number. 5. 100% matte sn is used for pb-free tsop plating. 6. snbi is used for pb-free tsop plating. 7. contact your spansion representative for av ailability of the 90ns sp eed option for laa064. valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. this product has been retired and is not recommended for design s. for new and current designs, s29gl128p supersedes s29gl128m, and is the factory-recommended migration path. please refer to the s29g l-p datasheet for specifications and ordering information. s29gl128m 90 t a i r1 0 packing type 0 = tray 2 = 7? tape and reel 3 = 13? tape and reel model number r1 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il r2 = x8/x16, v cc =3.0-3.6v, uniform sector de vice, lowest address sector protected when wp#/acc=v il r8 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il , fpt-56p-m01 package only r9 = x8/x16, v cc =3.0-3.6v, uniform sector de vice, lowest address sector protected when wp#/acc=v il , fpt-56p-m01 package only temperature range i = industrial (?40 c to +85 c) package material set a= standard f= pb-free d= pb-free package type t = thin small outline package (tsop) standard pinout f = fortified ball-grid array package speed option see product selector guide and valid combinations device number/description s29gl128m 128 megabit page-mode flash memory ma nufactured using 0.23 m mirrorbit? process technology, 3.0 volt-only read, program, and erase table 3. s29gl128m ordering options s29gl128m valid combinations package descriptions (notes) base ordering part number speed option package type, material, & temperature range model number packing type s29gl128m 90, 10, 11 ( note 7 ) tai, tfi r1, r2 0, 2, 3 ( note 1 ) ts056 ( 2 , 3 , 5 ) tsop tai, tdi r9 fpt-56p-m01 ( 3 , 6 ) fai, ffi r1, r2 laa064 ( 4 ) fortified-bga
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 21 data sheet ordering information: s29gl256m standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: notes: 1. type 0 is standard. specify others as required: tsops can be pack ed in types 0 and 3; bgas can be packed in types 0, 2, or 3. 2. tsop package marking omits the packing type designator from the ordering part number. 3. bga package marking omits leading ?s29? and packing type designator from the ordering part number. 4. 100% matte sn is used for pb-free tsop plating. 5. contact your spansion representative for availability of th e 100 ns speed option. valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. this product has been retired and is not recommended for design s. for new and current designs, s29gl256p supersedes s29gl256m, and is the factory-recommended migration path. please refer to the s29g l-p datasheet for specifications and ordering information. s29gl256m 11 t a i r1 0 packing type 0 = tray 2 = 7? tape and reel 3 = 13? tape and reel model number r1 = x8/x16, v cc =3.0-3.6v, uniform sector device, highest address sector protected when wp#/acc=v il r2 = x8/x16, v cc =3.0-3.6v, uniform sector device, lowest address sector protected when wp#/acc=v il temperature range i = industrial (?40 c to +85 c) package material set a= standard f= pb-free package type t = thin small outline package (tsop) standard pinout f = fortified ball-grid array package speed option see product selector guide and valid combinations device number/description s29gl256m 256 megabit page-mode flash memory ma nufactured using 0.23 m mirrorbit? process technology, 3.0 volt-only read, program, and erase ta b l e 4 . s 2 9 g l 2 5 6 m o r d e r i n g o p t i o n s s29gl256m valid combinations package description (notes) device number speed option package, material, & temperature range model number packing type s29gl256m 10, 11 ( note 5 ) tai,tfi r1,r2 0,2,3 ( note 1 ) ts056 ( 2 , 3 , 4 ) tsop fai,ffi lac064 ( 3 ) fortified bga
22 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet device bus operations this section describes the requirements and use of the device bus operations, which are initiated through the internal command register. the command register itself does not occupy any addres - sable memory location. the register is a latch used to store the commands, along with the address and data information needed to execute the command. the contents of the register serve as inputs to the internal state machine. the state machine outputs dictate the function of the de - vice. ta b l e 5 lists the device bus operations, the inputs and control levels they require, and the resulting output. the following subsections describ e each of these operations in further detail. legend: l = logic low = v il , h = logic high = v ih , v id = 11.5?12.5 v, v hh = 11.5 v ? 12.5 v, x = don?t care, sa = sector address, a in = address in, d in = data in, d out = data out notes: 1. addresses are amax:a0 in word mode; amax:a-1 in byte mode. sector addresses are amax:a15 in both modes. 2. the sector protect and sector unprotect functions may also be implemented via programming equipment. see the ?sector group protection and unprotection? section. 3. if wp# = v il , the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors are protected (for boot sector devices). if wp# = v ih , the first or last sector, or the two outer boot sectors are protected or unprotected as determined by the method described in ?sector group protection and unprotection? . all sectors are unprotected when shipped from the factory (the secured silicon se ctor may be factory protected depending on version ordered.) 4. d in or d out as required by command sequence, data polling, or sector protect algorithm (see figure 2 ). word/byte configuration the byte# pin controls whether the device data i/ o pins operate in the byte or word configura - tion. if the byte# pin is set at logic ?1?, the device is in word configuration, dq0?dq15 are active and controlled by ce# and oe#. if the byte# pin is set at logic ?0?, the device is in byte configuration, and only data i/o pins dq0? dq7 are active and controlled by ce# and oe#. the data i/o pins dq8?dq14 are tri-stated, and the dq15 pin is used as an input for the lsb (a-1) address function. requirements for reading array data to read array data from the outputs, the system must drive the ce# and oe# pins to v il . ce# is the power control and selects the device. oe# is the output control and gates array data to the output pins. we# should remain at v ih . ta b l e 5 . device bus operations operation ce# oe # we# reset# wp# ac c addresses ( note 1 ) dq0? dq7 dq8?dq15 byte# = v ih byte# = v il read llh h x x a in d out d out dq8?dq14 = high-z, dq15 = a-1 write (program/erase) lhl h( note 3 )x a in ( note 4 )( note 4 ) accelerated program lhl h( note 3 )v hh a in ( note 4 )( note 4 ) standby v cc 0.3 v xx v cc 0.3 v x h x high-z high-z high-z output disable l h h h x x x high-z high-z high-z reset x x x l x x x high-z high-z high-z sector group protect ( note 2 ) lhl v id hx sa, a6 =l, a3=l, a2=l, a1=h, a0=l ( note 4 )x x sector group unprotect ( note 2 ) lhl v id hx sa, a6=h, a3=l, a2=l, a1=h, a0=l ( note 4 )x x te m p o ra r y s e c t o r group unprotect xxx v id hx a in ( note 4 )( note 4 )high-z
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 23 data sheet the internal state machine is set for reading array data upon device power-up, or after a hardware reset. this ensures that no spurious alteration of the memory content occurs during the power transition. no command is necessary in this mode to obtain array data. standard microprocessor read cycles that assert valid addresses on the device address inputs produce valid data on the device data outputs. the device remains enabled for read access until the command register con - tents are altered. see reading array data for more information. see ac characteristics for timing specifications and the timing diagram. see dc characteristics for the active current specification on reading array data. page mode read the device is capable of fast pa ge mode read and is compatible with the page mode mask rom read operation. this mode provides faster read access speed for random locations within a page. the page size of the device is 4 words/8 bytes. the appropriate page is selected by the higher address bits a(max)?a2. address bits a1?a0 in word mode (a1?a-1 in byte mode) determine the specific word within a page. this is an asynch ronous operation; the microprocessor supplies the specific word location. the random or initial page access is equal to t acc or t ce and subsequent page read accesses (as long as the locations specified by the microprocessor falls within that page) is equivalent to t pacc . when ce# is deasserted and reasserted for a subsequent access, the access time is t acc or t ce . fast page mode accesses are obtained by keeping the ?read-page addresses? constant and changing the ?intra-read page? addresses. writing commands/command sequences to write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive we# and ce# to v il , and oe# to v ih . the device features an unlock bypass mode to facilitate faster programming. once the device enters the unlock bypass mode, only two write cycles are required to program a word, instead of four. word program command sequence contains details on programming data to the device using both standard and unlock bypass command sequences. an erase operation can erase one sector, multiple sectors, or the entire device. ta b l e 6 and ta b l e 16 indicates the address space that each sector occupies. see dc characteristics for the active current specification for the write mode. ac characteristics contains timing specification tables and timing diagrams for write operations. write buffer write buffer programming allows the system write to a maximum of 16 words/32 bytes in one programming operation. this results in faster e ffective programming time than the standard pro - gramming algorithms. see write buffer programming for more information. accelerated program operation the device offers accelerated pr ogram operations through the acc function. this is one of two functions provided by the wp#/acc or acc pin, depending on model number. this function is pri - marily intended to allow faster manuf acturing throughput at the factory. if the system asserts v hh on this pin, the device automatically enters the aforementioned unlock bypass mode, temporarily unprotects any protected sector groups, and uses the higher voltage on the pin to reduce the time required for prog ram operations. the system would use a two-cycle program command sequence as required by the unlock bypass mode. removing v hh from the wp#/acc or acc pin, depending on model number, returns the device to normal operation. note that the wp#/acc or acc pin must not be at v hh for operations other than accelerated program - ming, or device damage may result. wp# has an internal pullup; when unconnected, wp# is at v ih . autoselect functions if the system writes the autoselect command se quence, the device enters the autoselect mode. the system can then read autoselect codes from the internal register (which is separate from the memory array) on dq7?dq0. standard read cycle timings apply in this mode. see autoselect mode and autoselect command sequence for more information.
24 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet standby mode when the system is not reading or writing to the device, it can place the device in the standby mode. in this mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state, inde pendent of the oe# input. the device enters the cmos standby mode when the ce# and reset# pins are both held at v io 0.3 v. (note that this is a more restricted voltage range than v ih .) if ce# and reset# are held at v ih , but not within v io 0.3 v, the device is in the standby mode, but the standby current is greater. the device requires standard access time (t ce ) for read access when the device is in ei - ther of these standby modes, befo re it is ready to read data. if the device is deselected during erasure or programming, the device draws active current until the operation is completed. see dc characteristics for the standby current specification. automatic sleep mode the automatic sleep mode minimizes flash device energy consumption. the device automatically enables this mode when addresses remain stable for t acc + 30 ns. the automatic sleep mode is independent of the ce#, we#, and oe# control si gnals. standard address access timings provide new data when addresses are changed. while in sleep mode, output data is latched and always available to the system. see dc characteristics for the automatic sleep mode current specification. reset#: hardware reset pin the reset# pin provides a hardware method of re setting the device to reading array data. when the reset# pin is driven low for at least a period of t rp , the device immediately terminates any operation in progress, tristates all output pins, and ignores all read/write commands for the du - ration of the reset# pulse. the device also re sets the internal state machine to reading array data. the operation that was interrupted should be reinitiated once the device is ready to accept another command sequence, to ensure data integrity. current is reduced for the duration of the reset# pulse. when reset# is held at v ss 0.3 v, the device draws cmos standby current (i cc5 ). if reset# is held at v il but not within v ss 0.3 v, the standby current is greater. the reset# pin may be tied to the system reset circuitry. a system reset would thus also reset the flash memory, enabling the system to read the boot-up firmware from the flash memory. see ac characteristics for reset# parameters and to figure 15 for the timing diagram. output disable mode when the oe# input is at v ih , output from the device is disabl ed. the output pins are placed in the high impedance state.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 25 data sheet ta b l e 6 . s29gl032m (model r0) sector addresses sector a21?a16 8-bit address range sector a21?a16 8-bit address range sa0 0 0 0 0 0 0 000000?00ffff sa32 1 00000 200000?20ffff sa1 0 0 0 0 0 1 010000?01ffff sa33 1 00001 210000?21ffff sa2 0 0 0 0 1 0 020000?02ffff sa34 1 00010 220000?22ffff sa3 0 0 0 0 1 1 030000?03ffff sa35 1 00011 230000?23ffff sa4 0 0 0 1 0 0 040000?04ffff sa36 1 00100 240000?24ffff sa5 0 0 0 1 0 1 050000?05ffff sa37 1 00101 250000?25ffff sa6 0 0 0 1 1 0 060000?06ffff sa38 1 00110 260000?26ffff sa7 0 0 0 1 1 1 070000?07ffff sa39 1 00111 270000?27ffff sa8 0 0 1 0 0 0 080000?08ffff sa40 1 01000 280000?28ffff sa9 0 0 1 0 0 1 090000?09ffff sa41 1 01001 290000?29ffff sa10 0 0 1 0 1 0 0a0000?0affff sa42 1 01010 2a 0000?2affff sa11 0 0 1 0 1 1 0b0000?0bffff sa43 1 01011 2b 0000?2bffff sa12 0 0 1 1 0 0 0c0000?0cffff sa44 1 01100 2c 0000?2cffff sa13 0 0 1 1 0 1 0d0000?0dffff sa45 1 01101 2d 0000?2dffff sa14 0 0 1 1 1 0 0e0000?0effff sa46 1 01110 2e 0000?2effff sa15 0 0 1 1 1 1 0f0000?0fffff sa47 1 01111 2f 0000?2fffff sa16 0 1 0 0 0 0 100000?10ffff sa48 1 10000 300000?30ffff sa17 0 1 0 0 0 1 110000?11ffff sa49 1 10001 310000?31ffff sa18 0 1 0 0 1 0 120000?12ffff sa50 1 10010 320000?32ffff sa19 0 1 0 0 1 1 130000?13ffff sa51 1 10011 330000?33ffff sa20 0 1 0 1 0 0 140000?14ffff sa52 1 10100 340000?34ffff sa21 0 1 0 1 0 1 150000?15ffff sa53 1 10101 350000?35ffff sa22 0 1 0 1 1 0 160000?16ffff sa54 1 10110 360000?36ffff sa23 0 1 0 1 1 1 170000?17ffff sa55 1 10111 370000?37ffff sa24 0 1 1 0 0 0 180000?18ffff sa56 1 11000 380000?38ffff sa25 0 1 1 0 0 1 190000?19ffff sa57 1 11001 390000?39ffff sa26 0 1 1 0 1 0 1a0000?1affff sa58 1 11010 3a 0000?3affff sa27 0 1 1 0 1 1 1b0000?1bffff sa59 1 11011 3b 0000?3bffff sa28 0 1 1 1 0 0 1c0000?1cffff sa60 1 11100 3c 0000?3cffff sa29 0 1 1 1 0 1 1d0000?1dffff sa61 1 11101 3d 0000?3dffff sa30 0 1 1 1 1 0 1e0000?1effff sa62 1 11110 3e 0000?3effff sa31 0 1 1 1 1 1 1f0000?1fffff sa63 1 11111 3f 0000?3fffff
26 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 7 . s29gl032m (models r1, r2) sector addresses sector a20-a15 sector size (kb/ kwords) 8-bit address range 16-bit address range sector a20-a15 sector size (kb/ kwords) 8-bit address range 16-bit address range sa0 000000 64/32 000000?00ffff 000000?007fff sa32 1 0 0000 64/32 200 000?20ffff 100000?107fff sa1 000001 64/32 010000?01ffff 008000?00ffff sa33 1 0 0001 64/32 210 000?21ffff 108000?10ffff sa2 000010 64/32 020000?02ffff 010000?017fff sa34 1 0 0010 64/32 220 000?22ffff 110000?117fff sa3 000011 64/32 030000?03ffff 018000?01ffff sa35 1 0 0011 64/32 230 000?23ffff 118000?11ffff sa4 000100 64/32 040000?04ffff 020000?027fff sa36 1 0 0100 64/32 240 000?24ffff 120000?127fff sa5 000101 64/32 050000?05ffff 028000?02ffff sa37 1 0 0101 64/32 250 000?25ffff 128000?12ffff sa6 000110 64/32 060000?06ffff 030000?037fff sa38 1 0 0110 64/32 260 000?26ffff 130000?137fff sa7 000111 64/32 070000?07ffff 038000?03ffff sa39 1 0 0111 64/32 270 000?27ffff 138000?13ffff sa8 001000 64/32 080000?08ffff 040000?047fff sa40 1 0 1000 64/32 280 000?28ffff 140000?147fff sa9 001001 64/32 090000?09ffff 048000?04ffff sa41 1 0 1001 64/32 290 000?29ffff 148000?14ffff sa10 001010 64/32 0a000 0?0affff 050000?057fff sa42 1 0 1010 64/32 2a0 000?2affff 150000?157fff sa11 001011 64/32 0b000 0?0bffff 058000?05ffff sa43 1 0 1011 64/32 2b0 000?2bffff 158000?15ffff sa12 001100 64/32 0c000 0?0cffff 060000?067fff sa44 1 0 1100 64/32 2c0 000?2cffff 160000?167fff sa13 001101 64/32 0d000 0?0dffff 068000?06ffff sa45 1 0 1101 64/32 2d0 000?2dffff 168000?16ffff sa14 001110 64/32 0e000 0?0effff 070000?077fff sa46 1 0 1110 64/32 2e0 000?2effff 170000?177fff sa15 001111 64/32 0f000 0?0fffff 078000?07ffff sa47 1 0 1111 64/32 2f0 000?2fffff 178000?17ffff sa16 010000 64/32 100000?10ffff 080000?087fff sa48 1 1 0000 64/32 300 000?30ffff 180000?187fff sa17 010001 64/32 110000?11ffff 088000?08ffff sa49 1 1 0001 64/32 310 000?31ffff 188000?18ffff sa18 010010 64/32 120000?12ffff 090000?097fff sa50 1 1 0010 64/32 320 000?32ffff 190000?197fff sa19 010011 64/32 130000?13ffff 098000?09ffff sa51 1 1 0011 64/32 330 000?33ffff 198000?19ffff sa20 010100 64/32 140000?14ffff 0a0000?0a7fff sa52 1 1 0100 64/32 340 000?34ffff 1a0000?1a7fff sa21 010101 64/32 150000?15ffff 0a8000?0affff sa53 1 1 0101 64/32 350 000?35ffff 1a8000?1affff sa22 010110 64/32 160000?16ffff 0b0000?0b7fff sa54 1 1 0110 64/32 360 000?36ffff 1b0000?1b7fff sa23 010111 64/32 170000?17ffff 0b8000?0bffff sa55 1 1 0111 64/32 370 000?37ffff 1b8000?1bffff sa24 011000 64/32 180000?18ffff 0c0000?0c7fff sa56 1 1 1000 64/32 380 000?38ffff 1c0000?1c7fff sa25 011001 64/32 190000?19ffff 0c8000?0cffff sa57 1 1 1001 64/32 390 000?39ffff 1c8000?1cffff sa26 011010 64/32 1a000 0?1affff 0d0000?0d7fff sa58 1 1 1010 64/32 3a0 000?3affff 1d0000?1d7fff sa27 011011 64/32 1b000 0?1bffff 0d8000?0dffff sa59 1 1 1011 64/32 3b0 000?3bffff 1d8000?1dffff sa28 011100 64/32 1c000 0?1cffff 0e0000?0e7fff sa60 1 1 1100 64/32 3c0 000?3cffff 1e0000?1e7fff sa29 011101 64/32 1d000 0?1dffff 0e8000?0effff sa61 1 1 1101 64/32 3d0 000?3dffff 1e8000?1effff sa30 011110 64/32 1e000 0?1effff 0f0000?0f7fff sa62 1 1 1110 64/32 3e0 000?3effff 1f0000?1f7fff sa31 011111 64/32 1f000 0?1fffff 0f8000?0fffff sa63 1 1 1111 64/32 3f0 000?3fffff 1f8000?1fffff
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 27 data sheet * sector sizes are given in kbytes/kwords. ta b l e 8 . s29gl032m (model r3) top boot sector addresses sector a20?a12 sector size* 8-bit address range 16-bit address range sector a20?a12 sector size* 8-bit address range 16-bit address range sa0 000000xxx 64/32 000000h?00ffffh 00000h?07fffh sa36 100100xxx 64/32 240000h?24ffffh 120000h?127fffh sa1 000001xxx 64/32 010000h?01ffffh 08000h?0ffffh sa37 100101xxx 64/32 250000h?25ffffh 128000h?12ffffh sa2 000010xxx 64/32 020000h?02ffffh 10000h?17fffh sa38 100110xxx 64/32 260000h?26ffffh 130000h?137fffh sa3 000011xxx 64/32 030000h?03ffffh 18000h?1ffffh sa39 100111xxx 64/32 270000h?27ffffh 138000h?13ffffh sa4 000100xxx 64/32 040000h?04ffffh 20000h?27fffh sa40 101000xxx 64/32 280000h?28ffffh 140000h?147fffh sa5 000101xxx 64/32 050000h?05ffffh 28000h?2ffffh sa41 101001xxx 64/32 290000h?29ffffh 148000h?14ffffh sa6 000110xxx 64/32 060000h?06ffffh 30000h?37fffh sa42 101010xxx 64/32 2a0000h?2affffh 150000h?157fffh sa7 000111xxx 64/32 070000h?07ffffh 38000h?3ffffh sa43 101011xxx 64/32 2b0000h?2bffffh 158000h?15ffffh sa8 001000xxx 64/32 080000h?08ffffh 40000h?47fffh sa44 101100xxx 64/32 2c0000h?2cffffh 160000h?167fffh sa9 001001xxx 64/32 090000h?09ffffh 48000h?4ffffh sa45 101101xxx 64/32 2d0000h?2dffffh 168000h?16ffffh sa10 001010xxx 64/32 0a0000h?0affffh 50000h?57fffh sa46 101110xxx 64/32 2e0000h?2effffh 170000h?177fffh sa11 001011xxx 64/32 0b0000h?0bffffh 58000h?5ffffh sa47 101111xxx 64/32 2f0000h?2fffffh 178000h?17ffffh sa12 001100xxx 64/32 0c0000h?0cffffh 60000h?67fffh sa48 110000xxx 64/32 300000h?30ffffh 180000h?187fffh sa13 001101xxx 64/32 0d0000h?0dffffh 68000h?6ffffh sa49 110001xxx 64/32 310000h?31ffffh 188000h?18ffffh sa14 001101xxx 64/32 0e0000h?0effffh 70000h?77fffh sa50 110010xxx 64/32 320000h?32ffffh 190000h?197fffh sa15 001111xxx 64/32 0f0000h?0fffffh 78000h?7ffffh sa51 110011xxx 64/32 330000h?33ffffh 198000h?19ffffh sa16 010000xxx 64/32 100000h?00ffffh 80000h?87fffh sa52 100100xxx 64/32 340000h?34ffffh 1a0000h?1a7fffh sa17 010001xxx 64/32 110000h?11ffffh 88000h?8ffffh sa53 110101xxx 64/32 350000h?35ffffh 1a8000h?1affffh sa18 010010xxx 64/32 120000h?12ffffh 90000h?97fffh sa54 110110xxx 64/32 360000h?36ffffh 1b0000h?1b7fffh sa19 010011xxx 64/32 130000h?13ffffh 98000h?9ffffh sa55 110111xxx 64/32 370000h?37ffffh 1b8000h?1bffffh sa20 010100xxx 64/32 140000h?14ffffh a0000h?a7fffh sa56 111000xxx 64/32 380000h?38ffffh 1c0000h?1c7fffh sa21 010101xxx 64/32 150000h?15ffffh a8000h?affffh sa57 111001xxx 64/32 390000h?39ffffh 1c8000h?1cffffh sa22 010110xxx 64/32 160000h?16ffffh b0000h?b7fffh sa58 111010xxx 64/32 3a0000h?3affffh 1d0000h?1d7fffh sa23 010111xxx 64/32 170000h?17ffffh b8000h?bffffh sa 59 111011xxx 64/32 3b0000h?3bffffh 1d8000h?1dffffh sa24 011000xxx 64/32 180000h?18ffffh c0000h?c7fffh sa60 111100xxx 64/32 3c0000h?3cffffh 1e0000h?1e7fffh sa25 011001xxx 64/32 190000h?19ffffh c8000h?cffffh sa61 111101xxx 64/32 3d0000h?3dffffh 1e8000h?1effffh sa26 011010xxx 64/32 1a0000h?1affffh d0000h?d7fffh sa62 111110xxx 64/32 3e0000h?3effffh 1f0000h?1f7fffh sa27 011011xxx 64/32 1b0000h?1bffffh d8000h?dffffh sa63 111111000 8/4 3f0000h?3f1fffh 1f8000h?1f8fffh sa28 011000xxx 64/32 1c0000h?1cffffh e0000h?e7fffh sa64 111111001 8/4 3f2000h?3f3fffh 1f9000h?1f9fffh sa29 011101xxx 64/32 1d0000h?1dffffh e8000h?effffh sa65 111111010 8/4 3f4000h?3f5fffh 1fa000h?1fafffh sa30 011110xxx 64/32 1e0000h?1effffh f0000h?f7fffh sa66 111111011 8/4 3f6000h?3f7fffh 1fb000h?1fbfffh sa31 011111xxx 64/32 1f0000h?1fffffh f8000h?fffffh sa67 111111100 8/4 3f8000h?3f9fffh 1fc000h?1fcfffh sa32 100000xxx 64/32 200000h?20ffffh f9000h?107fffh sa68 111111101 8/4 3fa000h?3fbfffh 1fd000h?1fdfffh sa33 100001xxx 64/32 210000h?21ffffh 108000h?10ffffh sa69 111111110 8/4 3fc000h?3fdfffh 1fe000h?1fefffh sa34 100010xxx 64/32 220000h?22ffffh 110000h?117fffh sa70 111111111 8/4 3fe000h?3fffffh 1ff000h?1fffffh sa35 101011xxx 64/32 230000h?23ffffh 118000h?11ffffh
28 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet * sector sizes are given in kbytes/kwords. ta b l e 9 . s29gl032m (model r4) bottom boot sector addresses sector a20?a12 sector size* 8-bit address range 16-bit address range sector a20?a12 sector size* 8-bit address range 16-bit address range sa0 000000000 8/4 000000h?001fffh 00000h?00fffh sa19 001100xxx 64/32 0c0000h?0cffffh 60000h?67fffh sa1 000000001 8/4 002000h?003fffh 01000h?01fffh sa20 001101xxx 64/32 0d0000h?0dffffh 68000h?6ffffh sa2 000000010 8/4 004000h?005fffh 02000h?02fffh sa21 001101xxx 64/32 0e0000h?0effffh 70000h?77fffh sa3 000000011 8/4 006000h?007fffh 03000h?03fffh sa22 001111xxx 64/32 0f0000h?0fffffh 78000h?7ffffh sa4 000000100 8/4 008000h?009fffh 04000h?04fffh sa23 010000xxx 64/32 100000h?00ffffh 80000h?87fffh sa5 000000101 8/4 00a000h?00bfffh 05000h?05fffh sa24 010001xxx 64/32 110000h?11ffffh 88000h?8ffffh sa6 000000110 8/4 00c000h?00dfffh 06000h?06fffh sa25 010010xxx 64/32 120000h?12ffffh 90000h?97fffh sa7 000000111 8/4 00e000h?00fffffh 07000h?07fffh sa26 010011xxx 64/32 130000h?13ffffh 98000h?9ffffh sa8 000001xxx 64/32 010000h?01ffffh 08000h?0ffffh sa27 010100xxx 64/32 140000h?14ffffh a0000h?a7fffh sa9 000010xxx 64/32 020000h?02ffffh 10000h?17fffh sa28 010101xxx 64/32 150000h?15ffffh a8000h?affffh sa10 000011xxx 64/32 030000h?03ffffh 18000h?1ffffh sa29 010110xxx 64/32 160000h?16ffffh b0000h?b7fffh sa11 000100xxx 64/32 040000h?04ffffh 20000h?27fffh sa30 010111xxx 64/32 170000h?17ffffh b8000h?bffffh sa12 000101xxx 64/32 050000h?05ffffh 28000h?2ffffh sa31 011000xxx 64/32 180000h?18ffffh c0000h?c7fffh sa13 000110xxx 64/32 060000h?06ffffh 30000h?37fffh sa32 011001xxx 64/32 190000h?19ffffh c8000h?cffffh sa14 000111xxx 64/32 070000h?07ffffh 38000h?3ffffh sa33 011010xxx 64/32 1a0000h?1affffh d0000h?d7fffh sa15 001000xxx 64/32 080000h?08ffffh 40000h?47fffh sa34 011011xxx 64/32 1b0000h?1bffffh d8000h?dffffh sa16 001001xxx 64/32 090000h?09ffffh 48000h?4ffffh sa35 011000xxx 64/32 1c0000h?1cffffh e0000h?e7fffh sa17 001010xxx 64/32 0a0000h?0affffh 50000h?57fffh sa36 011101xxx 64/32 1d0000h?1dffffh e8000h?effffh sa18 001011xxx 64/32 0b0000h?0bffffh 58000h?5ffffh sa37 011110xxx 64/32 1e0000h?1effffh f0000h?f7fffh sa38 011111xxx 64/32 1f0000h?1fffffh f8000h?fffffh sa55 110000xxx 64/32 300000h?30ffffh 180000h?187fffh sa39 100000xxx 64/32 200000h?20ffffh f9000h?107fffh sa56 110001xxx 64/32 310000h?31ffffh 188000h?18ffffh sa40 100001xxx 64/32 210000h?21ffffh 108000h?10ffffh sa57 110010xxx 64/32 320000h?32ffffh 190000h?197fffh sa41 100010xxx 64/32 220000h?22ffffh 110000h?117fffh sa58 110011xxx 64/32 330000h?33ffffh 198000h?19ffffh sa42 101011xxx 64/32 230000h?23ffffh 118000h?11ffffh sa59 100100xxx 64/32 340000h?34ffffh 1a0000h?1a7fffh sa43 100100xxx 64/32 240000h?24ffffh 120000h?127fffh sa60 110101xxx 64/32 350000h?35ffffh 1a8000h?1affffh sa44 100101xxx 64/32 250000h?25ffffh 128000h?12ffffh sa61 110110xxx 64/32 360000h?36ffffh 1b0000h?1b7fffh sa45 100110xxx 64/32 260000h?26ffffh 130000h?137fffh sa62 110111xxx 64/32 370000h?37ffffh 1b8000h?1bffffh sa46 100111xxx 64/32 270000h?27ffffh 138000h?13ffffh sa63 111000xxx 64/32 380000h?38ffffh 1c0000h?1c7fffh sa47 101000xxx 64/32 280000h?28ffffh 140000h?147fffh sa64 111001xxx 64/32 390000h?39ffffh 1c8000h?1cffffh sa48 101001xxx 64/32 290000h?29ffffh 148000h?14ffffh sa65 111010xxx 64/32 3a0000h?3affffh 1d0000h?1d7fffh sa49 101010xxx 64/32 2a0000h?2affffh 150000h?157fffh sa66 111011xxx 64/32 3b0000h?3bffffh 1d8000h?1dffffh sa50 101011xxx 64/32 2b0000h?2bffffh 158000h?15ffffh sa67 111100xxx 64/32 3c0000h?3cffffh 1e0000h?1e7fffh sa51 101100xxx 64/32 2c0000h?2cffffh 160000h?167fffh sa68 111101xxx 64/32 3d0000h?3dffffh 1e8000h?1effffh sa52 101101xxx 64/32 2d0000h?2dffffh 168000h?16ffffh sa69 111110xxx 64/32 3e0000h?3effffh 1f0000h?1f7fffh sa53 101110xxx 64/32 2e0000h?2effffh 170000h?177fffh sa70 111111xxx 64/32 3f0000h?3fffffh 1f8000h?1fffffh sa54 101111xxx 64/32 2f0000h?2fffffh 178000h?17ffffh
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 29 data sheet ta b l e 1 0 . s29gl064m (model r0) sector addresses sector a22?a16 8-bit address range sector a22?a16 8-bit address range sector a22?a16 8-bit address range sa0 0000000 000000?00ffff sa43 0101011 2b000 0?2bffff sa86 1010110 560 000?56ffff sa1 0000001 010000?01ffff sa44 0101100 2c000 0?2cffff sa87 1010111 570 000?57ffff sa2 0000010 020000?02ffff sa45 0101101 2d000 0?2dffff sa88 1011000 580 000?58ffff sa3 0000011 030000?03ffff sa46 0101110 2e000 0?2effff sa89 1011001 590 000?59ffff sa4 0000100 040000?04ffff sa47 0101111 2f000 0?2fffff sa90 1011010 5a0 000?5affff sa5 0000101 050000?05ffff sa48 0110000 300000?30ffff sa91 1011011 5b0 000?5bffff sa6 0000110 060000?06ffff sa49 0110001 310000?31ffff sa92 1011100 5c0 000?5cffff sa7 0000111 070000?07ffff sa50 0110010 320000?32ffff sa93 1011101 5d0 000?5dffff sa8 0001000 080000?08ffff sa51 0110011 330000?33ffff sa94 1011110 5e0 000?5effff sa9 0001001 090000?09ffff sa52 0110100 340000?34ffff sa95 1011111 5f0 000?5fffff sa10 0001010 0a 0000?0affff sa53 0110101 350000?35ffff sa96 1100000 600 000?60ffff sa11 0001011 0b 0000?0bffff sa54 0110110 360000?36ffff sa97 1100001 610 000?61ffff sa12 0001100 0c 0000?0cffff sa55 0110111 370000?37ffff sa98 1100010 620 000?62ffff sa13 0001101 0d 0000?0dffff sa56 0111000 380000?38ffff sa99 1100011 630 000?63ffff sa14 0001110 0e 0000?0effff sa57 0111001 390000?39ffff sa100 1100100 640 000?64ffff sa15 0001111 0f 0000?0fffff sa58 0111010 3a000 0?3affff sa101 1100101 650 000?65ffff sa16 0010000 100000?10ffff sa59 0111011 3b000 0?3bffff sa102 1100110 660 000?66ffff sa17 0010001 110000?11ffff sa60 0111100 3c000 0?3cffff sa103 1100111 670 000?67ffff sa18 0010010 120000?12ffff sa61 0111101 3d000 0?3dffff sa104 1101000 680 000?68ffff sa19 0010011 130000?13ffff sa62 0111110 3e000 0?3effff sa105 1101001 690 000?69ffff sa20 0010100 140000?14ffff sa63 0111111 3f000 0?3fffff sa106 1101010 6a0 000?6affff sa21 0010101 150000?15ffff sa64 1000000 400000?40ffff sa107 1101011 6b0 000?6bffff sa22 0010110 160000?16ffff sa65 1000001 410000?41ffff sa108 1101100 6c0 000?6cffff sa23 0010111 170000?17ffff sa66 1000010 420000?42ffff sa109 1101101 6d0 000?6dffff sa24 0011000 180000?18ffff sa67 1000011 430000?43ffff sa110 1101110 6e0 000?6effff sa25 0011001 190000?19ffff sa68 1000100 440000?44ffff sa111 1101111 6f0 000?6fffff sa26 0011010 1a 0000?1affff sa69 1000101 450000?45ffff sa112 1110000 700 000?70ffff sa27 0011011 1b 0000?1bffff sa70 1000110 460000?46ffff sa113 1110001 710 000?71ffff sa28 0011100 1c 0000?1cffff sa71 1000111 470000?47ffff sa114 1110010 720 000?72ffff sa29 0011101 1d 0000?1dffff sa72 1001000 480000?48ffff sa115 1110011 730 000?73ffff sa30 0011110 1e 0000?1effff sa73 1001001 490000?49ffff sa116 1110100 740 000?74ffff sa31 0011111 1f 0000?1fffff sa74 1001010 4a000 0?4affff sa117 1110101 750 000?75ffff sa32 0100000 200000?20ffff sa75 1001011 4b000 0?4bffff sa118 1110110 760 000?76ffff sa33 0100001 210000?21ffff sa76 1001100 4c000 0?4cffff sa119 1110111 770 000?77ffff sa34 0100010 220000?22ffff sa77 1001101 4d000 0?4dffff sa120 1111000 780 000?78ffff sa35 0100011 230000?23ffff sa78 1001110 4e000 0?4effff sa121 1111001 790 000?79ffff sa36 0100100 240000?24ffff sa79 1001111 4f000 0?4fffff sa122 1111010 7a0 000?7affff sa37 0100101 250000?25ffff sa80 1010000 500000?50ffff sa123 1111011 7b0 000?7bffff sa38 0100110 260000?26ffff sa81 1010001 510000?51ffff sa124 1111100 7c0 000?7cffff sa39 0100111 270000?27ffff sa82 1010010 520000?52ffff sa125 1111101 7d0 000?7dffff sa40 0101000 280000?28ffff sa83 1010011 530000?53ffff sa126 1111110 7e0 000?7effff sa41 0101001 290000?29ffff sa84 1010100 540000?54ffff sa127 1111111 7f0 000?7fffff sa42 0101010 2a 0000?2affff sa85 1010101 550000?55ffff
30 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet table 11. s29gl064m (models r1, r2, r8, r9) sector addresses (sheet 1 of 3) sector a21?a15 sector size (kb/ kwords) 8-bit address range 8-bit address range sa0 0 0 0 0 0 0 0 64/32 000000?00ffff 000000?007fff sa1 0 0 0 0 0 0 1 64/32 010000?01ffff 008000?00ffff sa2 0 0 0 0 0 1 0 64/32 020000?02ffff 010000?017fff sa3 0 0 0 0 0 1 1 64/32 030000?03ffff 018000?01ffff sa4 0 0 0 0 1 0 0 64/32 040000?04ffff 020000?027fff sa5 0 0 0 0 1 0 1 64/32 050000?05ffff 028000?02ffff sa6 0 0 0 0 1 1 0 64/32 060000?06ffff 030000?037fff sa7 0 0 0 0 1 1 1 64/32 070000?07ffff 038000?03ffff sa8 0 0 0 1 0 0 0 64/32 080000?08ffff 040000?047fff sa9 0 0 0 1 0 0 1 64/32 090000?09ffff 048000?04ffff sa10 0 0 0 1 0 1 0 64/32 0a0000?0affff 050000?057fff sa11 0 0 0 1 0 1 1 64/32 0b0000?0bffff 058000?05ffff sa12 0 0 0 1 1 0 0 64/32 0c0000?0cffff 060000?067fff sa13 0 0 0 1 1 0 1 64/32 0d0000?0dffff 068000?06ffff sa14 0 0 0 1 1 1 0 64/32 0e0000?0effff 070000?077fff sa15 0 0 0 1 1 1 1 64/32 0f0000?0fffff 078000?07ffff sa16 0 0 1 0 0 0 0 64/32 100000?10ffff 080000?087fff sa17 0 0 1 0 0 0 1 64/32 110000?11ffff 088000?08ffff sa18 0 0 1 0 0 1 0 64/32 120000?12ffff 090000?097fff sa19 0 0 1 0 0 1 1 64/32 130000?13ffff 098000?09ffff sa20 0 0 1 0 1 0 0 64/32 140000?14ffff 0a0000?0a7fff sa21 0 0 1 0 1 0 1 64/32 150000?15ffff 0a8000?0affff sa22 0 0 1 0 1 1 0 64/32 160000?16ffff 0b0000?0b7fff sa23 0 0 1 0 1 1 1 64/32 170000?17ffff 0b8000?0bffff sa24 0 0 1 1 0 0 0 64/32 180000?18ffff 0c0000?0c7fff sa25 0 0 1 1 0 0 1 64/32 190000?19ffff 0c8000?0cffff sa26 0 0 1 1 0 1 0 64/32 1a0000?1affff 0d0000?0d7fff sa27 0 0 1 1 0 1 1 64/32 1b0000?1bffff 0d8000?0dffff sa28 0 0 1 1 1 0 0 64/32 1c0000?1cffff 0e0000?0e7fff sa29 0 0 1 1 1 0 1 64/32 1d0000?1dffff 0e8000?0effff sa30 0 0 1 1 1 1 0 64/32 1e0000?1effff 0f0000?0f7fff sa31 0 0 1 1 1 1 1 64/32 1f0000?1fffff 0f8000?0fffff sa32 0 1 0 0 0 0 0 64/32 200000?20ffff 100000?107fff sa33 0 1 0 0 0 0 1 64/32 210000?21ffff 108000?10ffff sa34 0 1 0 0 0 1 0 64/32 220000?22ffff 110000?117fff sa35 0 1 0 0 0 1 1 64/32 230000?23ffff 118000?11ffff sa36 0 1 0 0 1 0 0 64/32 240000?24ffff 120000?127fff sa37 0 1 0 0 1 0 1 64/32 250000?25ffff 128000?12ffff sa38 0 1 0 0 1 1 0 64/32 260000?26ffff 130000?137fff sa39 0 1 0 0 1 1 1 64/32 270000?27ffff 138000?13ffff sa40 0 1 0 1 0 0 0 64/32 280000?28ffff 140000?147fff sa41 0 1 0 1 0 0 1 64/32 290000?29ffff 148000?14ffff sa42 0 1 0 1 0 1 0 64/32 2a0000?2affff 150000?157fff sa43 0 1 0 1 0 1 1 64/32 2b0000?2bffff 158000?15ffff
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 31 data sheet sa44 0 1 0 1 1 0 0 64/32 2c0000?2cffff 160000?167fff sa45 0 1 0 1 1 0 1 64/32 2d0000?2dffff 168000?16ffff sa46 0 1 0 1 1 1 0 64/32 2e0000?2effff 170000?177fff sa47 0 1 0 1 1 1 1 64/32 2f0000?2fffff 178000?17ffff sa48 0 1 1 0 0 0 0 64/32 300000?30ffff 180000?187fff sa49 0 1 1 0 0 0 1 64/32 310000?31ffff 188000?18ffff sa50 0 1 1 0 0 1 0 64/32 320000?32ffff 190000?197fff sa51 0 1 1 0 0 1 1 64/32 330000?33ffff 198000?19ffff sa52 0 1 1 0 1 0 0 64/32 340000?34ffff 1a0000?1a7fff sa53 0 1 1 0 1 0 1 64/32 350000?35ffff 1a8000?1affff sa54 0 1 1 0 1 1 0 64/32 360000?36ffff 1b0000?1b7fff sa55 0 1 1 0 1 1 1 64/32 370000?37ffff 1b8000?1bffff sa56 0 1 1 1 0 0 0 64/32 380000?38ffff 1c0000?1c7fff sa57 0 1 1 1 0 0 1 64/32 390000?39ffff 1c8000?1cffff sa58 0 1 1 1 0 1 0 64/32 3a0000?3affff 1d0000?1d7fff sa59 0 1 1 1 0 1 1 64/32 3b0000?3bffff 1d8000?1dffff sa60 0 1 1 1 1 0 0 64/32 3c0000?3cffff 1e0000?1e7fff sa61 0 1 1 1 1 0 1 64/32 3d0000?3dffff 1e8000?1effff sa62 0 1 1 1 1 1 0 64/32 3e0000?3effff 1f0000?1f7fff sa63 0 1 1 1 1 1 1 64/32 3f0000?3fffff 1f8000?1fffff sa64 1 0 0 0 0 0 0 64/32 400000?40ffff 200000?207fff sa65 1 0 0 0 0 0 1 64/32 410000?41ffff 208000?20ffff sa66 1 0 0 0 0 1 0 64/32 420000?42ffff 210000?217fff sa67 1 0 0 0 0 1 1 64/32 430000?43ffff 218000?21ffff sa68 1 0 0 0 1 0 0 64/32 440000?44ffff 220000?227fff sa69 1 0 0 0 1 0 1 64/32 450000?45ffff 228000?22ffff sa70 1 0 0 0 1 1 0 64/32 460000?46ffff 230000?237fff sa71 1 0 0 0 1 1 1 64/32 470000?47ffff 238000?23ffff sa72 1 0 0 1 0 0 0 64/32 480000?48ffff 240000?247fff sa73 1 0 0 1 0 0 1 64/32 490000?49ffff 248000?24ffff sa74 1 0 0 1 0 1 0 64/32 4a0000?4affff 250000?257fff sa75 1 0 0 1 0 1 1 64/32 4b0000?4bffff 258000?25ffff sa76 1 0 0 1 1 0 0 64/32 4c0000?4cffff 260000?267fff sa77 1 0 0 1 1 0 1 64/32 4d0000?4dffff 268000?26ffff sa78 1 0 0 1 1 1 0 64/32 4e0000?4effff 270000?277fff sa79 1 0 0 1 1 1 1 64/32 4f0000?4fffff 278000?27ffff sa80 1 0 1 0 0 0 0 64/32 500000?50ffff 280000?287fff sa81 1 0 1 0 0 0 1 64/32 510000?51ffff 288000?28ffff sa82 1 0 1 0 0 1 0 64/32 520000?52ffff 290000?297fff sa83 1 0 1 0 0 1 1 64/32 530000?53ffff 298000?29ffff sa84 1 0 1 0 1 0 0 64/32 540000?54ffff 2a0000?2a7fff sa85 1 0 1 0 1 0 1 64/32 550000?55ffff 2a8000?2affff sa86 1 0 1 0 1 1 0 64/32 560000?56ffff 2b0000?2b7fff sa87 1 0 1 0 1 1 1 64/32 570000?57ffff 2b8000?2bffff table 11. s29gl064m (models r1, r2, r8, r9) sector addresses (sheet 2 of 3) sector a21?a15 sector size (kb/ kwords) 8-bit address range 8-bit address range
32 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet sa88 1 0 1 1 0 0 0 64/32 580000?58ffff 2c0000?2c7fff sa89 1 0 1 1 0 0 1 64/32 590000?59ffff 2c8000?2cffff sa90 1 0 1 1 0 1 0 64/32 5a0000?5affff 2d0000?2d7fff sa91 1 0 1 1 0 1 1 64/32 5b0000?5bffff 2d8000?2dffff sa92 1 0 1 1 1 0 0 64/32 5c0000?5cffff 2e0000?2e7fff sa93 1 0 1 1 1 0 1 64/32 5d0000?5dffff 2e8000?2effff sa94 1 0 1 1 1 1 0 64/32 5e0000?5effff 2f0000?2f7fff sa95 1 0 1 1 1 1 1 64/32 5f0000?5fffff 2f8000?2fffff sa96 1 1 0 0 0 0 0 64/32 600000?60ffff 300000?307fff sa97 1 1 0 0 0 0 1 64/32 610000?61ffff 308000?30ffff sa98 1 1 0 0 0 1 0 64/32 620000?62ffff 310000?317fff sa99 1 1 0 0 0 1 1 64/32 630000?63ffff 318000?31ffff sa100 1 1 0 0 1 0 0 64/32 640000?64ffff 320000?327fff sa101 1 1 0 0 1 0 1 64/32 650000?65ffff 328000?32ffff sa102 1 1 0 0 1 1 0 64/32 660000?66ffff 330000?337fff sa103 1 1 0 0 1 1 1 64/32 670000?67ffff 338000?33ffff sa104 1 1 0 1 0 0 0 64/32 680000?68ffff 340000?347fff sa105 1 1 0 1 0 0 1 64/32 690000?69ffff 348000?34ffff sa106 1 1 0 1 0 1 0 64/32 6a0000?6affff 350000?357fff sa107 1 1 0 1 0 1 1 64/32 6b0000?6bffff 358000?35ffff sa108 1 1 0 1 1 0 0 64/32 6c0000?6cffff 360000?367fff sa109 1 1 0 1 1 0 1 64/32 6d0000?6dffff 368000?36ffff sa110 1 1 0 1 1 1 0 64/32 6e0000?6effff 370000?377fff sa111 1 1 0 1 1 1 1 64/32 6f0000?6fffff 378000?37ffff sa112 1 1 1 0 0 0 0 64/32 700000?70ffff 380000?387fff sa113 1 1 1 0 0 0 1 64/32 710000?71ffff 388000?38ffff sa114 1 1 1 0 0 1 0 64/32 720000?72ffff 390000?397fff sa115 1 1 1 0 0 1 1 64/32 730000?73ffff 398000?39ffff sa116 1 1 1 0 1 0 0 64/32 740000?74ffff 3a0000?3a7fff sa117 1 1 1 0 1 0 1 64/32 750000?75ffff 3a8000?3affff sa118 1 1 1 0 1 1 0 64/32 760000?76ffff 3b0000?3b7fff sa119 1 1 1 0 1 1 1 64/32 770000?77ffff 3b8000?3bffff sa120 1 1 1 1 0 0 0 64/32 780000?78ffff 3c0000?3c7fff sa121 1 1 1 1 0 0 1 64/32 790000?79ffff 3c8000?3cffff sa122 1 1 1 1 0 1 0 64/32 7a0000?7affff 3d0000?3d7fff sa123 1 1 1 1 0 1 1 64/32 7b0000?7bffff 3d8000?3dffff sa124 1 1 1 1 1 0 0 64/32 7c0000?7cffff 3e0000?3e7fff sa125 1 1 1 1 1 0 1 64/32 7d0000?7dffff 3e8000?3effff sa126 1 1 1 1 1 1 0 64/32 7e0000?7effff 3f0000?3f7fff sa127 1 1 1 1 1 1 1 64/32 7f0000?7fffff 3f8000?3fffff table 11. s29gl064m (models r1, r2, r8, r9) sector addresses (sheet 3 of 3) sector a21?a15 sector size (kb/ kwords) 8-bit address range 8-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 33 data sheet ta b l e 1 2 . s29gl064m (model r3) top boot se ctor addresses (sheet 1 of 2) sector a21?a12 sector size* 8-bit address range 16-bit address range sector a21?a12 sector size* 8-bit address range 16-bit address range sa0 0000000xxx 64/32 000000h?00ffffh 00000h?07fffh sa45 0101101xxx 64/32 2d0000h?2dffffh 168000h?16ffffh sa1 0000001xxx 64/32 010000h?01ffffh 08000h?0ffffh sa46 0101110xxx 64/32 2e0000h?2effffh 170000h?177fffh sa2 0000010xxx 64/32 020000h?02ffffh 10000h?17fffh sa47 0101111xxx 64/32 2f0000h?2fffffh 178000h?17ffffh sa3 0000011xxx 64/32 030000h?03ffffh 18000h?1ffffh sa48 0110000xxx 64/32 300000h?30ffffh 180000h?187fffh sa4 0000100xxx 64/32 040000h?04ffffh 20000h?27fffh sa49 0110001xxx 64/32 310000h?31ffffh 188000h?18ffffh sa5 0000101xxx 64/32 050000h?05ffffh 28000h?2ffffh sa50 0110010xxx 64/32 320000h?32ffffh 190000h?197fffh sa6 0000110xxx 64/32 060000h?06ffffh 30000h?37fffh sa51 0110011xxx 64/32 330000h?33ffffh 198000h?19ffffh sa7 0000111xxx 64/32 070000h?07ffffh 38000h?3ffffh sa52 0100100xxx 64/32 340000h?34ffffh 1a0000h?1a7fffh sa8 0001000xxx 64/32 080000h?08ffffh 40000h?47fffh sa53 0110101xxx 64/32 350000h?35ffffh 1a8000h?1affffh sa9 0001001xxx 64/32 090000h?09ffffh 48000h?4ffffh sa54 0110110xxx 64/32 360000h?36ffffh 1b0000h?1b7fffh sa10 0001010xxx 64/32 0a0000h?0affffh 50000h?57fffh sa55 0110111xxx 64/32 370000h?37ffffh 1b8000h?1bffffh sa11 0001011xxx 64/32 0b0000h?0bffffh 58000h?5ffffh sa56 0111000xxx 64/32 380000h?38ffffh 1c0000h?1c7fffh sa12 0001100xxx 64/32 0c0000h?0cffffh 60000h?67fffh sa57 0111001xxx 64/32 390000h?39ffffh 1c8000h?1cffffh sa13 0001101xxx 64/32 0d0000h?0dffffh 68000h?6ffffh sa58 0111010xxx 64/32 3a0000h?3affffh 1d0000h?1d7fffh sa14 0001101xxx 64/32 0e0000h?0effffh 70000h?77fffh sa5 9 0111011xxx 64/32 3b0000h?3bffffh 1d8000h?1dffffh sa15 0001111xxx 64/32 0f0000h?0fffffh 78000h?7ffffh sa60 0111100xxx 64/32 3c0000h?3cffffh 1e0000h?1e7fffh sa16 0010000xxx 64/32 100000h?00ffffh 80000h?87fffh sa6 1 0111101xxx 64/32 3d0000h?3dffffh 1e8000h?1effffh sa17 0010001xxx 64/32 110000h?11ffffh 88000h?8ffffh sa62 0111110xxx 64/32 3e0000h?3effffh 1f0000h?1f7fffh sa18 0010010xxx 64/32 120000h?12ffffh 90000h?97fffh sa63 0111111xxx 64/32 3f0000h?3fffffh 1f8000h?1fffffh sa19 0010011xxx 64/32 130000h?13ffffh 98000h?9ffffh sa64 1000000xxx 64/32 400000h?40ffffh 200000h?207fffh sa20 0010100xxx 64/32 140000h?14ffffh a0000h?a7fffh sa65 1000001xxx 64/32 410000h?41ffffh 208000h?20ffffh sa21 0010101xxx 64/32 150000h?15ffffh a8000h?affffh sa66 1000010xxx 64/32 420000h?42ffffh 210000h?217fffh sa22 0010110xxx 64/32 160000h?16ffffh b0000h?b7fffh sa67 1000011xxx 64/32 430000h?43ffffh 218000h?21ffffh sa23 0010111xxx 64/32 170000h?17ffffh b8000h?bffffh sa68 1000100xxx 64/32 440000h?44ffffh 220000h?227fffh sa24 0011000xxx 64/32 180000h?18ffffh c0000h?c7fffh sa69 1000101xxx 64/32 450000h?45ffffh 228000h?22ffffh sa25 0011001xxx 64/32 190000h?19ffffh c8000h?cffffh sa70 1000110xxx 64/32 460000h?46ffffh 230000h?237fffh sa26 0011010xxx 64/32 1a0000h?1affffh d0000h?d7fffh sa71 1000111xxx 64/32 470000h?47ffffh 238000h?23ffffh sa27 0011011xxx 64/32 1b0000h?1bffffh d8000h?dffffh sa72 1001000xxx 64/32 480000h?48ffffh 240000h?247fffh sa28 0011000xxx 64/32 1c0000h?1cffffh e0000h?e7fffh sa73 1001001xxx 64/32 490000h?49ffffh 248000h?24ffffh sa29 0011101xxx 64/32 1d0000h?1dffffh e8000h?effffh sa7 4 1001010xxx 64/32 4a0000h?4affffh 250000h?257fffh sa30 0011110xxx 64/32 1e0000h?1effffh f0000h?f7fffh sa75 1001011xxx 64/32 4b0000h?4bffffh 258000h?25ffffh sa31 0011111xxx 64/32 1f0000h?1fffffh f8000h?fffffh sa76 1001100xxx 64/32 4c0000h?4cffffh 260000h?267fffh sa32 0100000xxx 64/32 200000h?20ffffh f9000h?107fffh sa77 1001101xxx 64/32 4d0000h?4dffffh 268000h?26ffffh sa33 0100001xxx 64/32 210000h?21ffffh 108000h?10ffffh sa78 1001110xxx 64/32 4e0000h?4effffh 270000h?277fffh sa34 0100010xxx 64/32 220000h?22ffffh 110000h?117fffh sa79 1001111xxx 64/32 4f0000h?4fffffh 278000h?27ffffh sa35 0101011xxx 64/32 230000h?23ffffh 118000h?11ffffh sa80 1010000xxx 64/32 500000h?50ffffh 280000h?28ffffh sa36 0100100xxx 64/32 240000h?24ffffh 120000h?127fffh sa81 1010001xxx 64/32 510000h?51ffffh 288000h?28ffffh sa37 0100101xxx 64/32 250000h?25ffffh 128000h?12ffffh sa82 1010010xxx 64/32 520000h?52ffffh 290000h?297fffh sa38 0100110xxx 64/32 260000h?26ffffh 130000h?137fffh sa83 1010011xxx 64/32 530000h?53ffffh 298000h?29ffffh sa39 0100111xxx 64/32 270000h?27ffffh 138000h?13ffffh sa84 1010100xxx 64/32 540000h?54ffffh 2a0000h?2a7fffh sa40 0101000xxx 64/32 280000h?28ffffh 140000h?147fffh sa85 1010101xxx 64/32 550000h?55ffffh 2a8000h?2affffh sa41 0101001xxx 64/32 290000h?29ffffh 148000h?14ffffh sa86 1010110xxx 64/32 560000h?56ffffh 2b0000h?2b7fffh sa42 0101010xxx 64/32 2a0000h?2affffh 150000h?157fffh sa87 1010111xxx 64/32 570000h?57ffffh 2b8000h?2bffffh sa43 0101011xxx 64/32 2b0000h?2bffffh 158000h?15ffffh sa88 1011000xxx 64/32 580000h?58ffffh 2c0000h?2c7fffh sa44 0101100xxx 64/32 2c0000h?2cffffh 160000h?167fffh sa89 1011001xxx 64/32 590000h?59ffffh 2c8000h?2cffffh
34 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet * sector sizes are given in kbytes/kwords. sa90 1011010xxx 64/32 5a0000h?5affffh 2d0000h?2d7fffh sa113 1110001xxx 64/32 710000h?71ffffh 388000h?38ffffh sa91 1011011xxx 64/32 5b0000h?5bffffh 2d8000h?2dffffh sa114 1110010xxx 64/32 720000h?72ffffh 390000h?397fffh sa92 1011100xxx 64/32 5c0000h?5cffffh 2e0000h?2e7fffh sa115 1110011xxx 64/32 730000h?73ffffh 398000h?39ffffh sa93 1011101xxx 64/32 5d0000h?5dffffh 2e8000h?2effffh sa116 1110100xxx 64/32 740000h?74ffffh 3a0000h?3a7fffh sa94 1011110xxx 64/32 5e0000h?5effffh 2f0000h?2fffffh sa117 1110101xxx 64/32 750000h?75ffffh 3a8000h?3affffh sa95 1011111xxx 64/32 5f0000h?5fffffh 2f8000h?2fffffh sa118 1110110xxx 64/32 760000h?76ffffh 3b0000h?3b7fffh sa96 1100000xxx 64/32 600000h?60ffffh 300000h?307fffh sa119 1110111xxx 64/32 770000h?77ffffh 3b8000h?3bffffh sa97 1100001xxx 64/32 610000h?61ffffh 308000h?30ffffh sa120 1111000xxx 64/32 780000h?78ffffh 3c0000h?3c7fffh sa98 1100010xxx 64/32 620000h?62ffffh 310000h?317fffh sa121 1111001xxx 64/32 790000h?79ffffh 3c8000h?3cffffh sa99 1100011xxx 64/32 630000h?63ffffh 318000h?31ffffh sa122 1111010xxx 64/32 7a0000h?7affffh 3d0000h?3d7fffh sa100 1100100xxx 64/32 640000h?64ffffh 320000h?327fffh sa123 1111011xxx 64/32 7b0000h?7bffffh 3d8000h?3dffffh sa101 1100101xxx 64/32 650000h?65ffffh 328000h?32ffffh sa124 1111100xxx 64/32 7c0000h?7cffffh 3e0000h?3e7fffh sa102 1100110xxx 64/32 660000h?66ffffh 330000h?337fffh sa 125 1111101xxx 64/32 7d0000h?7dffffh 3e8000h?3effffh sa103 1100111xxx 64/32 670000h?67ffffh 338000h?33ffffh sa126 1111110xxx 64/32 7e0000h?7effffh 3f0000h?3f7fffh sa104 1101000xxx 64/32 680000h?68ffffh 340000h?347fffh sa127 1111111000 8/4 7f0000h?7f1fffh 3f8000h?3f8fffh sa105 1101001xxx 64/32 690000h?69ffffh 348000h?34ffffh sa128 1111111001 8/4 7f2000h?7f3fffh 3f9000h?3f9fffh sa106 1101010xxx 64/32 6a0000h?6affffh 350000h?357fffh sa129 1111111010 8/4 7f4000h?7f5fffh 3fa000h?3fafffh sa107 1101011xxx 64/32 6b0000h?6bffffh 358000h?35ffffh sa130 1111111011 8/4 7f6000h?7f7fffh 3fb000h?3fbfffh sa108 1101100xxx 64/32 6c0000h?6cffffh 360000h?367fffh sa131 1111111100 8/4 7f8000h?7f9fffh 3fc000h?3fcfffh sa109 1101101xxx 64/32 6d0000h?6dffffh 368000h?36ffffh sa132 1111111101 8/4 7fa000h?7fbfffh 3fd000h?3fdfffh sa110 1101110xxx 64/32 6e0000h?6effffh 370000h?377fffh sa133 1111111110 8/4 7fc000h?7fdfffh 3fe000h?3fefffh sa111 1101111xxx 64/32 6f0000h?6fffffh 378000h?37ffffh sa134 1111111111 8/4 7fe000h?7fffffh 3ff000h?3fffffh sa112 1110000xxx 64/32 700000h?70ffffh 380000h?387fffh table 12. s29gl064m (model r3) top boot sector addresses (sheet 2 of 2) sector a21?a12 sector size* 8-bit address range 16-bit address range sector a21?a12 sector size* 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 35 data sheet ta b l e 1 3 . s29gl064m (model r4) bottom boot sector addresses (sheet 1 of 2) sector a21?a12 sector size* 8-bit address range 16-bit address range sector a21?a12 sector size* 8-bit address range 16-bit address range sa0 0000000000 8/4 000000h?001fffh 00000h?00fffh sa45 0100110xxx 64/32 260000h?26ffffh 130000h?137fffh sa1 0000000001 8/4 002000h?003fffh 01000h?01fffh sa46 0100111xxx 64/32 270000h?27ffffh 138000h?13ffffh sa2 0000000010 8/4 004000h?005fffh 02000h?02fffh sa47 0101000xxx 64/32 280000h?28ffffh 140000h?147fffh sa3 0000000011 8/4 006000h?007fffh 03000h?03fffh sa48 0101001xxx 64/32 290000h?29ffffh 148000h?14ffffh sa4 0000000100 8/4 008000h?009fffh 04000h?04fffh sa49 0101010xxx 64/32 2a0000h?2affffh 150000h?157fffh sa5 0000000101 8/4 00a000h?00bfffh 05000h?05fffh sa50 0101011xxx 64/32 2b0000h?2bffffh 158000h?15ffffh sa6 0000000110 8/4 00c000h?00dfffh 06000h?06fffh sa51 0101100xxx 64/32 2c0000h?2cffffh 160000h?167fffh sa7 0000000111 8/4 00e000h?00fffffh 07000h?07fffh sa52 0101101xxx 64/32 2d0000h?2dffffh 168000h?16ffffh sa8 0000001xxx 64/32 010000h?01ffffh 08000h?0ffffh sa53 0101110xxx 64/32 2e0000h?2effffh 170000h?177fffh sa9 0000010xxx 64/32 020000h?02ffffh 10000h?17fffh sa54 0101111xxx 64/32 2f0000h?2fffffh 178000h?17ffffh sa10 0000011xxx 64/32 030000h?03ffffh 18000h?1ffffh sa55 0110000xxx 64/32 300000h?30ffffh 180000h?187fffh sa11 0000100xxx 64/32 040000h?04ffffh 20000h?27fffh sa56 0110001xxx 64/32 310000h?31ffffh 188000h?18ffffh sa12 0000101xxx 64/32 050000h?05ffffh 28000h?2ffffh sa57 0110010xxx 64/32 320000h?32ffffh 190000h?197fffh sa13 0000110xxx 64/32 060000h?06ffffh 30000h?37fffh sa58 0110011xxx 64/32 330000h?33ffffh 198000h?19ffffh sa14 0000111xxx 64/32 070000h?07ffffh 38000h?3ffffh sa59 0100100xxx 64/32 340000h?34ffffh 1a0000h?1a7fffh sa15 0001000xxx 64/32 080000h?08ffffh 40000h?47fffh sa60 0110101xxx 64/32 350000h?35ffffh 1a8000h?1affffh sa16 0001001xxx 64/32 090000h?09ffffh 48000h?4ffffh sa61 0110110xxx 64/32 360000h?36ffffh 1b0000h?1b7fffh sa17 0001010xxx 64/32 0a0000h?0affffh 50000h?57fffh sa62 0110111xxx 64/32 370000h?37ffffh 1b8000h?1bffffh sa18 0001011xxx 64/32 0b0000h?0bffffh 58000h?5ffffh sa63 0111000xxx 64/32 380000h?38ffffh 1c0000h?1c7fffh sa19 0001100xxx 64/32 0c0000h?0cffffh 60000h?67fffh sa64 0111001xxx 64/32 390000h?39ffffh 1c8000h?1cffffh sa20 0001101xxx 64/32 0d0000h?0dffffh 68000h?6ffffh sa65 0111010xxx 64/32 3a0000h?3affffh 1d0000h?1d7fffh sa21 0001101xxx 64/32 0e0000h?0effffh 70000h?77fffh sa66 0111011xxx 64/32 3b0000h?3bffffh 1d8000h?1dffffh sa22 0001111xxx 64/32 0f0000h?0fffffh 78000h?7ffffh sa67 0111100xxx 64/32 3c0000h?3cffffh 1e0000h?1e7fffh sa23 0010000xxx 64/32 100000h?00ffffh 80000h?87fffh sa68 0111101xxx 64/32 3d0000h?3dffffh 1e8000h?1effffh sa24 0010001xxx 64/32 110000h?11ffffh 88000h?8ffffh sa69 0111110xxx 64/32 3e0000h?3effffh 1f0000h?1f7fffh sa25 0010010xxx 64/32 120000h?12ffffh 90000h?97fffh sa70 0111111xxx 64/32 3f0000h?3fffffh 1f8000h?1fffffh sa26 0010011xxx 64/32 130000h?13ffffh 98000h?9ffffh sa71 1000000xxx 64/32 400000h?40ffffh 200000h?207fffh sa27 0010100xxx 64/32 140000h?14ffffh a0000h?a7fffh sa72 1000001xxx 64/32 410000h?41ffffh 208000h?20ffffh sa28 0010101xxx 64/32 150000h?15ffffh a8000h?affffh sa73 1000010xxx 64/32 420000h?42ffffh 210000h?217fffh sa29 0010110xxx 64/32 160000h?16ffffh b0000h?b7fffh sa74 1000011xxx 64/32 430000h?43ffffh 218000h?21ffffh sa30 0010111xxx 64/32 170000h?17ffffh b8000h?bffffh sa75 1000100xxx 64/32 440000h?44ffffh 220000h?227fffh sa31 0011000xxx 64/32 180000h?18ffffh c0000h?c7fffh sa76 1000101xxx 64/32 450000h?45ffffh 228000h?22ffffh sa32 0011001xxx 64/32 190000h?19ffffh c8000h?cffffh sa77 1000110xxx 64/32 460000h?46ffffh 230000h?237fffh sa33 0011010xxx 64/32 1a0000h?1affffh d0000h?d7fffh sa78 1000111xxx 64/32 470000h?47ffffh 238000h?23ffffh sa34 0011011xxx 64/32 1b0000h?1bffffh d8000h?dffffh sa79 1001000xxx 64/32 480000h?48ffffh 240000h?247fffh sa35 0011000xxx 64/32 1c0000h?1cffffh e0000h?e7fffh sa80 1001001xxx 64/32 490000h?49ffffh 248000h?24ffffh sa36 0011101xxx 64/32 1d0000h?1dffffh e8000h?effffh sa81 1001010xxx 64/32 4a0000h?4affffh 250000h?257fffh sa37 0011110xxx 64/32 1e0000h?1effffh f0000h?f7fffh sa82 1001011xxx 64/32 4b0000h?4bffffh 258000h?25ffffh sa38 0011111xxx 64/32 1f0000h?1fffffh f8000h?fffffh sa83 1001100xxx 64/32 4c0000h?4cffffh 260000h?267fffh sa39 0100000xxx 64/32 200000h?20ffffh f9000h?107fffh sa84 1001101xxx 64/32 4d0000h?4dffffh 268000h?26ffffh sa40 0100001xxx 64/32 210000h?21ffffh 108000h?10ffffh sa85 1001110xxx 64/32 4e0000h?4effffh 270000h?277fffh sa41 0100010xxx 64/32 220000h?22ffffh 110000h?117fffh sa86 1001111xxx 64/32 4f0000h?4fffffh 278000h?27ffffh sa42 0101011xxx 64/32 230000h?23ffffh 118000h?11ffffh sa87 1010000xxx 64/32 500000h?50ffffh 280000h?28ffffh sa43 0100100xxx 64/32 240000h?24ffffh 120000h?127fffh sa88 1010001xxx 64/32 510000h?51ffffh 288000h?28ffffh sa44 0100101xxx 64/32 250000h?25ffffh 128000h?12ffffh sa89 1010010xxx 64/32 520000h?52ffffh 290000h?297fffh
36 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet * sector sizes are given in kbytes/kwords. sa90 1010011xxx 64/32 530000h?53ffffh 298000h?29ffffh sa113 1101010xxx 64/32 6a0000h?6affffh 350000h?357fffh sa91 1010100xxx 64/32 540000h?54ffffh 2a0000h?2a7fffh sa114 1101011xxx 64/32 6b0000h?6bffffh 358000h?35ffffh sa92 1010101xxx 64/32 550000h?55ffffh 2a8000h?2affffh sa115 1101100xxx 64/32 6c0000h?6cffffh 360000h?367fffh sa93 1010110xxx 64/32 560000h?56ffffh 2b0000h?2b7fffh sa116 1101101xxx 64/32 6d0000h?6dffffh 368000h?36ffffh sa94 1010111xxx 64/32 570000h?57ffffh 2b8000h?2bffffh sa117 1101110xxx 64/32 6e0000h?6effffh 370000h?377fffh sa95 1011000xxx 64/32 580000h?58ffffh 2c0000h?2c7fffh sa118 1101111xxx 64/32 6f0000h?6fffffh 378000h?37ffffh sa96 1011001xxx 64/32 590000h?59ffffh 2c8000h?2cffffh sa119 1110000xxx 64/32 700000h?70ffffh 380000h?387fffh sa97 1011010xxx 64/32 5a0000h?5affffh 2d0000h?2d7fffh sa120 1110001xxx 64/32 710000h?71ffffh 388000h?38ffffh sa98 1011011xxx 64/32 5b0000h?5bffffh 2d8000h?2dffffh sa121 1110010xxx 64/32 720000h?72ffffh 390000h?397fffh sa99 1011100xxx 64/32 5c0000h?5cffffh 2e0000h?2e7fffh sa122 1110011xxx 64/32 730000h?73ffffh 398000h?39ffffh sa100 1011101xxx 64/32 5d0000h?5dffffh 2e8000h?2effffh sa123 1110100xxx 64/32 740000h?74ffffh 3a0000h?3a7fffh sa101 1011110xxx 64/32 5e0000h?5effffh 2f0000h?2fffffh sa124 1110101xxx 64/32 750000h?75ffffh 3a8000h?3affffh sa102 1011111xxx 64/32 5f0000h?5fffffh 2f8000h?2fffffh sa125 1110110xxx 64/32 760000h?76ffffh 3b0000h?3b7fffh sa103 1100000xxx 64/32 600000h?60ffffh 300000h?307fffh sa126 1110111xxx 64/32 770000h?77ffffh 3b8000h?3bffffh sa104 1100001xxx 64/32 610000h?61ffffh 308000h?30ffffh sa127 1111000xxx 64/32 780000h?78ffffh 3c0000h?3c7fffh sa105 1100010xxx 64/32 620000h?62ffffh 310000h?317fffh sa128 1111001xxx 64/32 790000h?79ffffh 3c8000h?3cffffh sa106 1100011xxx 64/32 630000h?63ffffh 318000h?31ffffh sa129 1111010xxx 64/32 7a0000h?7affffh 3d0000h?3d7fffh sa107 1100100xxx 64/32 640000h?64ffffh 320000h?327fffh sa130 1111011xxx 64/32 7b0000h?7bffffh 3d8000h?3dffffh sa108 1100101xxx 64/32 650000h?65ffffh 328000h?32ffffh sa131 1111100xxx 64/32 7c0000h?7cffffh 3e0000h?3e7fffh sa109 1100110xxx 64/32 660000h?66ffffh 330000h?337fffh sa132 1111101xxx 64/32 7d0000h?7dffffh 3e8000h?3effffh sa110 1100111xxx 64/32 670000h?67ffffh 338000h?33ffffh sa133 1111110xxx 64/32 7e0000h?7effffh 3f0000h?3f7fffh sa111 1101000xxx 64/32 680000h?68ffffh 340000h?347fffh sa134 1111111000 64/32 7f0000h?7fffffh 3f8000h?3fffffh sa112 1101001xxx 64/32 690000h?69ffffh 348000h?34ffffh table 13. s29gl064m (model r4) bottom boot sector addresses (sheet 2 of 2) sector a21?a12 sector size* 8-bit address range 16-bit address range sector a21?a12 sector size* 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 37 data sheet ta b l e 1 4 . s29gl064m (model r5, r6, r7) sector addresses sector a21?a15 16-bit address range sector a21?a15 16-bit address range sector a21?a15 16-bit address range sa0 0 0 0 0 0 0 0 000000?007fff sa43 0 1 0 1 0 1 1 158000?15ffff sa86 1 0 1 0 1 1 0 2b0000?2b7fff sa1 0 0 0 0 0 0 1 008000?00ffff sa44 0 1 0 1 1 0 0 160000?167fff sa87 1 0 1 0 1 1 1 2b8000?2bffff sa2 0 0 0 0 0 1 0 010000?017fff sa45 0 1 0 1 1 0 1 168000?16ffff sa88 1 0 1 1 0 0 0 2c0000?2c7fff sa3 0 0 0 0 0 1 1 018000?01ffff sa46 0 1 0 1 1 1 0 170000?177fff sa89 1 0 1 1 0 0 1 2c8000?2cffff sa4 0 0 0 0 1 0 0 020000?027fff sa47 0 1 0 1 1 1 1 178000?17ffff sa90 1 0 1 1 0 1 0 2d0000?2d7fff sa5 0 0 0 0 1 0 1 028000?02ffff sa48 0 1 1 0 0 0 0 180000?187fff sa91 1 0 1 1 0 1 1 2d8000?2dffff sa6 0 0 0 0 1 1 0 030000?037fff sa49 0 1 1 0 0 0 1 188000?18ffff sa92 1 0 1 1 1 0 0 2e0000?2e7fff sa7 0 0 0 0 1 1 1 038000?03ffff sa50 0 1 1 0 0 1 0 190000?197fff sa93 1 0 1 1 1 0 1 2e8000?2effff sa8 0 0 0 1 0 0 0 040000?047fff sa51 0 1 1 0 0 1 1 198000?19ffff sa94 1 0 1 1 1 1 0 2f0000?2f7fff sa9 0 0 0 1 0 0 1 048000?04ffff sa52 0 1 1 0 1 0 0 1a0000?1a7fff sa95 1 0 1 1 1 1 1 2f8000?2fffff sa10 0 0 0 1 0 1 0 050000?057fff sa53 0 1 1 0 1 0 1 1a8000?1affff sa96 1 1 0 0 0 0 0 300000?307fff sa11 0 0 0 1 0 1 1 058000?05ffff sa54 0 1 1 0 1 1 0 1b0000?1b7fff sa97 1 1 0 0 0 0 1 308000?30ffff sa12 0 0 0 1 1 0 0 060000?067fff sa55 0 1 1 0 1 1 1 1b8000?1bffff sa98 1 1 0 0 0 1 0 310000?317fff sa13 0 0 0 1 1 0 1 068000?06ffff sa56 0 1 1 1 0 0 0 1c0000?1c7fff sa99 1 1 0 0 0 1 1 318000?31ffff sa14 0 0 0 1 1 1 0 070000?077fff sa57 0 1 1 1 0 0 1 1c8000?1cffff sa100 1 1 0 0 1 0 0 320000?327fff sa15 0 0 0 1 1 1 1 078000?07ffff sa58 0 1 1 1 0 1 0 1d0000?1d7fff sa101 1 1 0 0 1 0 1 328000?32ffff sa16 0 0 1 0 0 0 0 080000?087fff sa59 0 1 1 1 0 1 1 1d8000?1dffff sa102 1 1 0 0 1 1 0 330000?337fff sa17 0 0 1 0 0 0 1 088000?08ffff sa60 0 1 1 1 1 0 0 1e0000?1e7fff sa103 1 1 0 0 1 1 1 338000?33ffff sa18 0 0 1 0 0 1 0 090000?097fff sa61 0 1 1 1 1 0 1 1e8000?1effff sa104 1 1 0 1 0 0 0 340000?347fff sa19 0 0 1 0 0 1 1 098000?09ffff sa62 0 1 1 1 1 1 0 1f0000?1f7fff sa105 1 1 0 1 0 0 1 348000?34ffff sa20 0 0 1 0 1 0 0 0a0000?0a7fff sa63 0 1 1 1 1 1 1 1f8000?1fffff sa106 1 1 0 1 0 1 0 350000?357fff sa21 0 0 1 0 1 0 1 0a8000?0affff sa64 1 0 0 0 0 0 0 200000?207fff sa107 1 1 0 1 0 1 1 358000?35ffff sa22 0 0 1 0 1 1 0 0b0000?0b7fff sa65 1 0 0 0 0 0 1 208000?20ffff sa108 1 1 0 1 1 0 0 360000?367fff sa23 0 0 1 0 1 1 1 0b8000?0bffff sa66 1 0 0 0 0 1 0 210000?217fff sa109 1 1 0 1 1 0 1 368000?36ffff sa24 0 0 1 1 0 0 0 0c0000?0c7fff sa67 1 0 0 0 0 1 1 218000?21ffff sa110 1 1 0 1 1 1 0 370000?377fff sa25 0 0 1 1 0 0 1 0c8000?0cffff sa68 1 0 0 0 1 0 0 220000?227fff sa111 1 1 0 1 1 1 1 378000?37ffff sa26 0 0 1 1 0 1 0 0d0000?0d7fff sa69 1 0 0 0 1 0 1 228000?22ffff sa112 1 1 1 0 0 0 0 380000?387fff sa27 0 0 1 1 0 1 1 0d8000?0dffff sa70 1 0 0 0 1 1 0 230000?237fff sa113 1 1 1 0 0 0 1 388000?38ffff sa28 0 0 1 1 1 0 0 0e0000?0e7fff sa71 1 0 0 0 1 1 1 238000?23ffff sa114 1 1 1 0 0 1 0 390000?397fff sa29 0 0 1 1 1 0 1 0e8000?0effff sa72 1 0 0 1 0 0 0 240000?247fff sa115 1 1 1 0 0 1 1 398000?39ffff sa30 0 0 1 1 1 1 0 0f0000?0f7fff sa73 1 0 0 1 0 0 1 248000?24ffff sa116 1 1 1 0 1 0 0 3a0000?3a7fff sa31 0 0 1 1 1 1 1 0f8000?0fffff sa74 1 0 0 1 0 1 0 250000?257fff sa117 1 1 1 0 1 0 1 3a8000?3affff sa32 0 1 0 0 0 0 0 100000?107fff sa75 1 0 0 1 0 1 1 258000?25ffff sa118 1 1 1 0 1 1 0 3b0000?3b7fff sa33 0 1 0 0 0 0 1 108000?10ffff sa76 1 0 0 1 1 0 0 260000?267fff sa119 1 1 1 0 1 1 1 3b8000?3bffff sa34 0 1 0 0 0 1 0 110000?117fff sa77 1 0 0 1 1 0 1 268000?26ffff sa120 1 1 1 1 0 0 0 3c0000?3c7fff sa35 0 1 0 0 0 1 1 118000?11ffff sa78 1 0 0 1 1 1 0 270000?277fff sa121 1 1 1 1 0 0 1 3c8000?3cffff sa36 0 1 0 0 1 0 0 120000?127fff sa79 1 0 0 1 1 1 1 278000?27ffff sa122 1 1 1 1 0 1 0 3d0000?3d7fff sa37 0 1 0 0 1 0 1 128000?12ffff sa80 1 0 1 0 0 0 0 280000?287fff sa123 1 1 1 1 0 1 1 3d8000?3dffff sa38 0 1 0 0 1 1 0 130000?137fff sa81 1 0 1 0 0 0 1 288000?28ffff sa124 1 1 1 1 1 0 0 3e0000?3e7fff sa39 0 1 0 0 1 1 1 138000?13ffff sa82 1 0 1 0 0 1 0 290000?297fff sa125 1 1 1 1 1 0 1 3e8000?3effff sa40 0 1 0 1 0 0 0 140000?147fff sa83 1 0 1 0 0 1 1 298000?29ffff sa126 1 1 1 1 1 1 0 3f0000?3f7fff sa41 0 1 0 1 0 0 1 148000?14ffff sa84 1 0 1 0 1 0 0 2a0000?2a7fff sa127 1 1 1 1 1 1 1 3f8000?3fffff sa42 0 1 0 1 0 1 0 150000?157fff sa85 1 0 1 0 1 0 1 2a8000?2affff
38 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 1 5 . s29gl128m sector address table (sheet 1 of 3) sector a22?a15 sector size* 8-bit address range 16-bit address range sector a22?a15 sector size* 8-bit address range 16-bit address range sa0 00000000 64/32 000000?00ffff 000000?007fff sa41 00101001 64/32 290000?29ffff 148000?14ffff sa1 00000001 64/32 010000?01ffff 008000?00ffff sa42 00101010 64/32 2a0000?2affff 150000?157fff sa2 00000010 64/32 020000?02ffff 010000?017fff sa43 00101011 64/32 2b0000?2bffff 158000?15ffff sa3 00000011 64/32 030000?03ffff 018000?01ffff sa44 00101100 64/32 2c0000?2cffff 160000?167fff sa4 00000100 64/32 040000?04ffff 020000?027fff sa45 00101101 64/32 2d0000?2dffff 168000?16ffff sa5 00000101 64/32 050000?05ffff 028000?02ffff sa46 00101110 64/32 2e0000?2effff 170000?177fff sa6 00000110 64/32 060000?06ffff 030000?037fff sa47 00101111 64/32 2f0000?2fffff 178000?17ffff sa7 00000111 64/32 070000?07ffff 038000?03ffff sa48 00110000 64/32 300000?30ffff 180000?187fff sa8 00001000 64/32 080000?08ffff 040000?047fff sa49 00110001 64/32 310000?31ffff 188000?18ffff sa9 00001001 64/32 090000?09ffff 048000?04ffff sa50 00110010 64/32 320000?32ffff 190000?197fff sa10 00001010 64/32 0a0000?0affff 050000?057fff sa51 00110011 64/32 330000?33ffff 198000?19ffff sa11 00001011 64/32 0b0000?0bffff 058000?05ffff sa52 00110100 64/32 340000?34ffff 1a0000?1a7fff sa12 00001100 64/32 0c0000?0cffff 060000?067fff sa53 00110101 64/32 350000?35ffff 1a8000?1affff sa13 00001101 64/32 0d0000?0dffff 068000?06ffff sa54 00110110 64/32 360000?36ffff 1b0000?1b7fff sa14 00001110 64/32 0e0000?0effff 070000?077fff sa55 00110111 64/32 370000?37ffff 1b8000?1bffff sa15 00001111 64/32 0f0000?0fffff 078000?07ffff sa56 00111000 64/32 380000?38ffff 1c0000?1c7fff sa16 00010000 64/32 100000?10ffff 080000?087fff sa57 00111001 64/32 390000?39ffff 1c8000?1cffff sa17 00010001 64/32 110000?11ffff 088000?08ffff sa58 00111010 64/32 3a0000?3affff 1d0000?1d7fff sa18 00010010 64/32 120000?12ffff 090000?097fff sa59 00111011 64/32 3b0000?3bffff 1d8000?1dffff sa19 00010011 64/32 130000?13ffff 098000?09ffff sa60 00111100 64/32 3c0000?3cffff 1e0000?1e7fff sa20 00010100 64/32 140000?14ffff 0a0000?0a7fff sa61 00111101 64/32 3d0000?3dffff 1e8000?1effff sa21 00010101 64/32 150000?15ffff 0a8000?0affff sa62 00111110 64/32 3e0000?3effff 1f0000?1f7fff sa22 00010110 64/32 160000?16ffff 0b0000?0b7fff sa63 00111111 64/32 3f0000?3fffff 1f8000?1fffff sa23 00010111 64/32 170000?17ffff 0b8000?0bffff sa64 01000000 64/32 400000?40ffff 200000?207fff sa24 00011000 64/32 180000?18ffff 0c0000?0c7fff sa65 01000001 64/32 410000?41ffff 208000?20ffff sa25 00011001 64/32 190000?19ffff 0c8000?0cffff sa66 01000010 64/32 420000?42ffff 210000?217fff sa26 00011010 64/32 1a0000?1affff 0d0000?0d7fff sa67 01000011 64/32 430000?43ffff 218000?21ffff sa27 00011011 64/32 1b0000?1bffff 0d8000?0dffff sa68 01000100 64/32 440000?44ffff 220000?227fff sa28 00011100 64/32 1c0000?1cffff 0e0000?0e7fff sa69 01000101 64/32 450000?45ffff 228000?22ffff sa29 00011101 64/32 1d0000?1dffff 0e8000?0effff sa70 01000110 64/32 460000?46ffff 230000?237fff sa30 00011110 64/32 1e0000?1effff 0f0000?0f7fff sa71 01000111 64/32 470000?47ffff 238000?23ffff sa31 00011111 64/32 1f0000?1fffff 0f8000?0fffff sa72 01001000 64/32 480000?48ffff 240000?247fff sa32 00100000 64/32 200000?20ffff 100000?107fff sa73 01001001 64/32 490000?49ffff 248000?24ffff sa33 00100001 64/32 210000?21ffff 108000?10ffff sa74 01001010 64/32 4a0000?4affff 250000?257fff sa34 00100010 64/32 220000?22ffff 110000?117fff sa75 01001011 64/32 4b0000?4bffff 258000?25ffff sa35 00100011 64/32 230000?23ffff 118000?11ffff sa76 01001100 64/32 4c0000?4cffff 260000?267fff sa36 00100100 64/32 240000?24ffff 120000?127fff sa77 01001101 64/32 4d0000?4dffff 268000?26ffff sa37 00100101 64/32 250000?25ffff 128000?12ffff sa78 01001110 64/32 4e0000?4effff 270000?277fff sa38 00100110 64/32 260000?26ffff 130000?137fff sa79 01001111 64/32 4f0000?4fffff 278000?27ffff sa39 00100111 64/32 270000?27ffff 138000?13ffff sa80 01010000 64/32 500000?50ffff 280000?287fff sa40 00101000 64/32 280000?28ffff 140000?147fff sa81 01010001 64/32 510000?51ffff 288000?28ffff
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 39 data sheet sa82 01010010 64/32 520000?52ffff 290000?297fff sa158 10011110 64/32 9e0000?9effff 4f0000?4f7fff sa83 01010011 64/32 530000?53ffff 298000?29ffff sa159 10011111 64/32 9f0000?9fffff 4f8000?4fffff sa84 01010100 64/32 540000?54ffff 2a0000?2a7fff sa160 10100000 64/32 a00000?a0ffff 500000?507fff sa85 01010101 64/32 550000?55ffff 2a8000?2affff sa161 10100001 64/32 a10000?a1ffff 508000?50ffff sa86 01010110 64/32 560000?56ffff 2b0000?2b7fff sa162 10100010 64/32 a20000?a2ffff 510000?517fff sa87 01010111 64/32 570000?57ffff 2b8000?2bffff sa163 10100011 64/32 a30000?a3ffff 518000?51ffff sa88 01011000 64/32 580000?58ffff 2c0000?2c7fff sa164 10100100 64/32 a40000?a4ffff 520000?527fff sa89 01011001 64/32 590000?59ffff 2c8000?2cffff sa165 10100101 64/32 a50000?a5ffff 528000?52ffff sa90 01011010 64/32 5a0000?5affff 2d0000?2d7fff sa166 10100110 64/32 a60000?a6ffff 530000?537fff sa91 01011011 64/32 5b0000?5bffff 2d8000?2dffff sa167 10100111 64/32 a70000?a7ffff 538000?53ffff sa92 01011100 64/32 5c0000?5cffff 2e0000?2e7fff sa168 10101000 64/32 a80000?a8ffff 540000?547fff sa93 01011101 64/32 5d0000?5dffff 2e8000?2effff sa169 10101001 64/32 a90000?a9ffff 548000?54ffff sa94 01011110 64/32 5e0000?5effff 2f0000?2f7fff sa170 10101010 64/32 aa0000?aaffff 550000?557fff sa95 01011111 64/32 5f0000?5fffff 2f8000?2fffff sa171 10101011 64/32 ab0000?abffff 558000?55ffff sa96 01100000 64/32 600000?60ffff 300000?307fff sa172 10101100 64/32 ac0000?acffff 560000?567fff sa97 01100001 64/32 610000?61ffff 308000?30ffff sa173 10101101 64/32 ad0000?adffff 568000?56ffff sa98 01100010 64/32 620000?62ffff 310000?317fff sa174 10101110 64/32 ae0000?aeffff 570000?577fff sa66 01000010 64/32 420000?42ffff 210000?217fff sa175 10101111 64/32 af0000?afffff 578000?57ffff sa67 01000011 64/32 430000?43ffff 218000?21ffff sa176 10110000 64/32 b00000?b0ffff 580000?587fff sa136 10001000 64/32 880000?88ffff 440000?447fff sa177 10110001 64/32 b10000?b1ffff 588000?58ffff sa137 10001001 64/32 890000?89ffff 448000?44ffff sa178 10110010 64/32 b20000?b2ffff 590000?597fff sa138 10001010 64/32 8a0000?8affff 450000?457fff sa179 10110011 64/32 b30000?b3ffff 598000?59ffff sa139 10001011 64/32 8b0000?8bffff 458000?45ffff sa180 10110100 64/32 b40000?b4ffff 5a0000?5a7fff sa140 10001100 64/32 8c0000?8cffff 460000?467fff sa181 10110101 64/32 b50000?b5ffff 5a8000?5affff sa141 10001101 64/32 8d0000?8dffff 468000?46ffff sa182 10110110 64/32 b60000?b6ffff 5b0000?5b7fff sa142 10001110 64/32 8e0000?8effff 470000?477fff sa183 10110111 64/32 b70000?b7ffff 5b8000?5bffff sa143 10001111 64/32 8f0000?8fffff 478000?47ffff sa184 10111000 64/32 b80000?b8ffff 5c0000?5c7fff sa144 10010000 64/32 900000?90ffff 480000?487fff sa185 10111001 64/32 b90000?b9ffff 5c8000?5cffff sa145 10010001 64/32 910000?91ffff 488000?48ffff sa186 10111010 64/32 ba0000?baffff 5d0000?5d7fff sa146 10010010 64/32 920000?92ffff 490000?497fff sa187 10111011 64/32 bb0000?bbffff 5d8000?5dffff sa147 10010011 64/32 930000?93ffff 498000?49ffff sa188 10111100 64/32 bc0000?bcffff 5e0000?5e7fff sa148 10010100 64/32 940000?94ffff 4a0000?4a7fff sa189 10111101 64/32 bd0000?bdffff 5e8000?5effff sa149 10010101 64/32 950000?95ffff 4a8000?4affff sa190 10111110 64/32 be0000?beffff 5f0000?5f7fff sa150 10010110 64/32 960000?96ffff 4b0000?4b7fff sa191 10111111 64/32 bf0000?bfffff 5f8000?5fffff sa151 10010111 64/32 970000?97ffff 4b8000?4bffff sa192 11000000 64/32 c00000?c0ffff 600000?607fff sa152 10011000 64/32 980000?98ffff 4c0000?4c7fff sa193 11000001 64/32 c10000?c1ffff 608000?60ffff sa153 10011001 64/32 990000?99ffff 4c8000?4cffff sa194 11000010 64/32 c20000?c2ffff 610000?617fff sa154 10011010 64/32 9a0000?9affff 4d0000?4d7fff sa195 11000011 64/32 c30000?c3ffff 618000?61ffff sa155 10011011 64/32 9b0000?9bffff 4d8000?4dffff sa196 11000100 64/32 c40000?c4ffff 620000?627fff sa156 10011100 64/32 9c0000?9cffff 4e0000?4e7fff sa197 11000101 64/32 c50000?c5ffff 628000?62ffff sa157 10011101 64/32 9d0000?9dffff 4e8000?4effff sa198 11000110 64/32 c60000?c6ffff 630000?637fff table 15. s29gl128m sector address table (sheet 2 of 3) sector a22?a15 sector size* 8-bit address range 16-bit address range sector a22?a15 sector size* 8-bit address range 16-bit address range
40 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet * sector sizes are given in kbytes/kwords. sa199 11000111 64/32 c70000?c7ffff 638000?63ffff sa228 11100100 64/32 e40000?e4ffff 720000?727fff sa200 11001000 64/32 c80000?c8ffff 640000?647fff sa229 11100101 64/32 e50000?e5ffff 728000?72ffff sa201 11001001 64/32 c90000?c9ffff 648000?64ffff sa230 11100110 64/32 e60000?e6ffff 730000?737fff sa202 11001010 64/32 ca0000?caffff 650000?657fff sa231 11100111 64/32 e70000?e7ffff 738000?73ffff sa203 11001011 64/32 cb0000?cbffff 658000?65ffff sa232 11101000 64/32 e80000?e8ffff 740000?747fff sa204 11001100 64/32 cc0000?ccffff 660000?667fff sa233 11101001 64/32 e90000?e9ffff 748000?74ffff sa205 11001101 64/32 cd0000?cdffff 668000?66ffff sa234 11101010 64/32 ea0000?eaffff 750000?757fff sa206 11001110 64/32 ce0000?ceffff 670000?677fff sa235 11101011 64/32 eb0000?ebffff 758000?75ffff sa207 11001111 64/32 cf0000?cfffff 678000?67ffff sa236 11101100 64/32 ec0000?ecffff 760000?767fff sa208 11010000 64/32 d00000?d0ffff 680000?687fff sa237 11101101 64/32 ed0000?edffff 768000?76ffff sa209 11010001 64/32 d10000?d1ffff 688000?68ffff sa238 11101110 64/32 ee0000?eeffff 770000?777fff sa210 11010010 64/32 d20000?d2ffff 690000?697fff sa239 11101111 64/32 ef0000?efffff 778000?77ffff sa211 11010011 64/32 d30000?d3ffff 698000?69ffff sa240 11110000 64/32 f00000?f0ffff 780000?787fff sa212 11010100 64/32 d40000?d4ffff 6a0000?6a7fff sa241 11110001 64/32 f10000?f1ffff 788000?78ffff sa213 11010101 64/32 d50000?d5ffff 6a8000?6affff sa242 11110010 64/32 f20000?f2ffff 790000?797fff sa214 11010110 64/32 d60000?d6ffff 6b0000?6b7fff sa243 11110011 64/32 f30000?f3ffff 798000?79ffff sa215 11010111 64/32 d70000?d7ffff 6b8000?6bffff sa244 11110100 64/32 f40000?f4ffff 7a0000?7a7fff sa216 11011000 64/32 d80000?d8ffff 6c0000?6c7fff sa245 11110101 64/32 f50000?f5ffff 7a8000?7affff sa217 11011001 64/32 d90000?d9ffff 6c8000?6cffff sa246 11110110 64/32 f60000?f6ffff 7b0000?7b7fff sa218 11011010 64/32 da0000?daffff 6d0000?6d7fff sa247 11110111 64/32 f70000?f7ffff 7b8000?7bffff sa219 11011011 64/32 db0000?dbffff 6d8000?6dffff sa248 11111000 64/32 f80000?f8ffff 7c0000?7c7fff sa220 11011100 64/32 dc0000?dcffff 6e0000?6e7fff sa249 11111001 64/32 f90000?f9ffff 7c8000?7cffff sa221 11011101 64/32 dd0000?ddffff 6e8000?6effff sa250 11111010 64/32 fa0000?faffff 7d0000?7d7fff sa222 11011110 64/32 de0000?deffff 6f0000?6f7fff sa251 11111011 64/32 fb0000?fbffff 7d8000?7dffff sa223 11011111 64/32 df0000?dfffff 6f8000?6fffff sa252 11111100 64/32 fc0000?fcffff 7e0000?7e7fff sa224 11100000 64/32 e00000?e0ffff 700000?707fff sa253 11111101 64/32 fd0000?fdffff 7e8000?7effff sa225 11100001 64/32 e10000?e1ffff 708000?70ffff sa254 11111110 64/32 fe0000?feffff 7f0000?7f7fff sa226 11100010 64/32 e20000?e2ffff 710000?717fff sa255 11111111 64/32 ff0000?ffffff 7f8000?7fffff sa227 11100011 64/32 e30000?e3ffff 718000?71ffff table 15. s29gl128m sector address table (sheet 3 of 3) sector a22?a15 sector size* 8-bit address range 16-bit address range sector a22?a15 sector size* 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 41 data sheet ta b l e 1 6 . s29gl256m sector address table (sheet 1 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range sa0 000000000 0000000?000ffff 000000?007fff sa44 000101100 02c0000?02cffff 160000?167fff sa1 000000001 0010000?001ffff 008000?00ffff sa45 000101101 02d0000?02dffff 168000?16ffff sa2 000000010 0020000?002ffff 010000?017fff sa46 000101110 02e0000?02effff 170000?177fff sa3 000000011 0030000?003ffff 018000?01ffff sa47 000101111 02f0000?02fffff 178000?17ffff sa4 000000100 0040000?004ffff 020000?027fff sa48 000110000 0300000?030ffff 180000?187fff sa5 000000101 0050000?005ffff 028000?02ffff sa49 000110001 0310000?031ffff 188000?18ffff sa6 000000110 0060000?006ffff 030000?037fff sa50 000110010 0320000?032ffff 190000?197fff sa7 000000111 0070000?007ffff 038000?03ffff sa51 000110011 0330000?033ffff 198000?19ffff sa8 000001000 0080000?008ffff 040000?047fff sa52 000110100 0340000?034ffff 1a0000?1a7fff sa9 000001001 0090000?009ffff 048000?04ffff sa53 000110101 0350000?035ffff 1a8000?1affff sa10 000001010 00a0000?00affff 050000?057fff sa54 000110110 0360000?036ffff 1b0000?1b7fff sa11 000001011 00b0000?00bffff 058000?05ffff sa55 000110111 0370000?037ffff 1b8000?1bffff sa12 000001100 00c0000?00cffff 060000?067fff sa56 000111000 0380000?038ffff 1c0000?1c7fff sa13 000001101 00d0000?00dffff 068000?06ffff sa57 000111001 0390000?039ffff 1c8000?1cffff sa14 000001110 00e0000?00effff 070000?077fff sa58 000111010 03a0000?03affff 1d0000?1d7fff sa15 000001111 00f0000?00fffff 078000?07ffff sa59 000111011 03b0000?03bffff 1d8000?1dffff sa16 000010000 0100000?010ffff 080000?087fff sa60 000111100 03c0000?03cffff 1e0000?1e7fff sa17 000010001 0110000?011ffff 088000?08ffff sa61 000111101 03d0000?03dffff 1e8000?1effff sa18 000010010 0120000?012ffff 090000?097fff sa62 000111110 03e0000?03effff 1f0000?1f7fff sa19 000010011 0130000?013ffff 098000?09ffff sa63 000111111 03f0000?03fffff 1f8000?1fffff sa20 000010100 0140000?014ffff 0a0000?0a7fff sa64 001000000 0400000?040ffff 200000?207fff sa21 000010101 0150000?015ffff 0a8000?0affff sa65 001000001 0410000?041ffff 208000?20ffff sa22 000010110 0160000?016ffff 0b0000?0b7fff sa66 001000010 0420000?042ffff 210000?217fff sa23 000010111 0170000?017ffff 0b8000?0bffff sa67 001000011 0430000?043ffff 218000?21ffff sa24 000011000 0180000?018ffff 0c0000?0c7fff sa68 001000100 0440000?044ffff 220000?227fff sa25 000011001 0190000?019ffff 0c8000?0cffff sa69 001000101 0450000?045ffff 228000?22ffff sa26 000011010 01a0000?01affff 0d0000?0d7fff sa70 001000110 0460000?046ffff 230000?237fff sa27 000011011 01b0000?01bffff 0d8000?0dffff sa71 001000111 0470000?047ffff 238000?23ffff sa28 000011100 01c0000?01cffff 0e0000?0e7fff sa72 001001000 0480000?048ffff 240000?247fff sa29 000011101 01d0000?01dffff 0e8000?0effff sa73 001001001 0490000?049ffff 248000?24ffff sa30 000011110 01e0000?01effff 0f0000?0f7fff sa74 001001010 04a0 000?04affff 250000?257fff sa31 000011111 01f0000?01fffff 0f8000?0fffff sa75 001001011 04b0 000?04bffff 258000?25ffff sa32 000100000 0200000?020ffff 100000?107fff sa76 001001100 04c0 000?04cffff 260000?267fff sa33 000100001 0210000?021ffff 108000?10ffff sa77 001001101 04d0 000?04dffff 268000?26ffff sa34 000100010 0220000?022ffff 110000?117fff sa78 001001110 04e0 000?04effff 270000?277fff sa35 000100011 0230000?023ffff 118000?11ffff sa79 001001111 04f0 000?04fffff 278000?27ffff sa36 000100100 0240000?024ffff 120000?127fff sa80 001010000 0500000?050ffff 280000?287fff sa37 000100101 0250000?025ffff 128000?12ffff sa81 001010001 0510000?051ffff 288000?28ffff sa38 000100110 0260000?026ffff 130000?137fff sa82 001010010 0520000?052ffff 290000?297fff sa39 000100111 0270000?027ffff 138000?13ffff sa83 001010011 0530000?053ffff 298000?29ffff sa40 000101000 0280000?028ffff 140000?147fff sa84 001010100 0540000?054ffff 2a0000?2a7fff sa41 000101001 0290000?029ffff 148000?14ffff sa85 001010101 0550000?055ffff 2a8000?2affff sa42 000101010 02a0000?02affff 150000?157fff sa86 001010110 0560000?056ffff 2b0000?2b7fff sa43 000101011 02b0000?02bffff 158000?15ffff sa87 001010111 0570000?057ffff 2b8000?2bffff
42 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet sa88 001011000 0 580000?058ffff 2c0000?2c7fff sa133 010000101 0850000?085ffff 428000?42ffff sa89 001011001 0 590000?059ffff 2c8000?2cffff sa134 010000110 0860000?086ffff 430000?437fff sa90 001011010 05a 0000?05affff 2d0000?2d7fff sa135 010000111 0870000?087ffff 438000?43ffff sa91 001011011 05b 0000?05bffff 2d8000?2dffff sa136 010001000 0880000?088ffff 440000?447fff sa92 001011100 05c 0000?05cffff 2e0000?2e7fff sa137 010001001 0890000?089ffff 448000?44ffff sa93 001011101 05d 0000?05dffff 2e8000?2effff sa138 010001010 08a0 000?08affff 450000?457fff sa94 001011110 05e 0000?05effff 2f0000?2f7fff sa139 010001011 08b0 000?08bffff 458000?45ffff sa95 001011111 05f 0000?05fffff 2f8000?2fffff sa140 010001100 08c0 000?08cffff 460000?467fff sa96 001100000 0 600000?060ffff 300000?307fff sa141 010001101 08d0 000?08dffff 468000?46ffff sa97 001100001 0 610000?061ffff 308000?30ffff sa142 010001110 08e0 000?08effff 470000?477fff sa98 001100010 0 620000?062ffff 310000?317fff sa143 010001111 08f0 000?08fffff 478000?47ffff sa99 001100011 0 630000?063ffff 318000?31ffff sa144 010010000 0900000?090ffff 480000?487fff sa100 001100100 0 640000?064ffff 320000?327fff sa145 010010001 0910000?091ffff 488000?48ffff sa101 001100101 0 650000?065ffff 328000?32ffff sa146 010010010 0920000?092ffff 490000?497fff sa102 001100110 0 660000?066ffff 330000?337fff sa147 010010011 0930000?093ffff 498000?49ffff sa103 001100111 0 670000?067ffff 338000?33ffff sa148 010010100 0940000?094ffff 4a0000?4a7fff sa104 001101000 0 680000?068ffff 340000?347fff sa149 010010101 0950000?095ffff 4a8000?4affff sa105 001101001 0 690000?069ffff 348000?34ffff sa150 010010110 0960000?096ffff 4b0000?4b7fff sa106 001101010 06a 0000?06affff 350000?357fff sa151 010010111 0970000?097ffff 4b8000?4bffff sa107 001101011 06b 0000?06bffff 358000?35ffff sa152 010011000 0980000?098ffff 4c0000?4c7fff sa108 001101100 06c 0000?06cffff 360000?367fff sa153 010011001 0990000?099ffff 4c8000?4cffff sa109 001101101 06d 0000?06dffff 368000?36ffff sa154 010011010 09a0 000?09affff 4d0000?4d7fff sa110 001101110 06e 0000?06effff 370000?377fff sa155 010011011 09b0 000?09bffff 4d8000?4dffff sa111 001101111 06f 0000?06fffff 378000?37ffff sa156 010011100 09c0 000?09cffff 4e0000?4e7fff sa112 001110000 0 700000?070ffff 380000?387fff sa157 010011101 09d0 000?09dffff 4e8000?4effff sa113 001110001 0 710000?071ffff 388000?38ffff sa158 010011110 09e0 000?09effff 4f0000?4f7fff sa114 001110010 0 720000?072ffff 390000?397fff sa159 010011111 09f0 000?09fffff 4f8000?4fffff sa115 001110011 0 730000?073ffff 398000?39ffff sa160 010100000 0a00 000?0a0ffff 500000?507fff sa116 001110100 0 740000?074ffff 3a0000?3a7fff sa161 010100001 0a10 000?0a1ffff 508000?50ffff sa117 001110101 0 750000?075ffff 3a8000?3affff sa162 010100010 0a20 000?0a2ffff 510000?517fff sa118 001110110 0 760000?076ffff 3b0000?3b7fff sa163 010100011 0a30 000?0a3ffff 518000?51ffff sa119 001110111 0 770000?077ffff 3b8000?3bffff sa164 010100100 0a40 000?0a4ffff 520000?527fff sa120 001111000 0 780000?078ffff 3c0000?3c7fff sa165 010100101 0a50 000?0a5ffff 528000?52ffff sa121 001111001 0 790000?079ffff 3c8000?3cffff sa166 010100110 0a60 000?0a6ffff 530000?537fff sa122 001111010 07a 0000?07affff 3d0000?3d7fff sa167 010100111 0a70 000?0a7ffff 538000?53ffff sa123 001111011 07b 0000?07bffff 3d8000?3dffff sa168 010101000 0a80 000?0a8ffff 540000?547fff sa124 001111100 07c 0000?07cffff 3e0000?3e7fff sa169 010101001 0a90 000?0a9ffff 548000?54ffff sa125 001111101 07d 0000?07dffff 3e8000?3effff sa170 010101010 0aa0 000?0aaffff 550000?557fff sa126 001111110 07e 0000?07effff 3f0000?3f7fff sa171 010101011 0ab0 000?0abffff 558000?55ffff sa127 001111111 07f 0000?07fffff 3f8000?3fffff sa172 010101100 0ac0 000?0acffff 560000?567fff sa128 010000000 0 800000?080ffff 400000?407fff sa173 010101101 0ad0 000?0adffff 568000?56ffff sa129 010000001 0 810000?081ffff 408000?40ffff sa174 010101110 0ae0 000?0aeffff 570000?577fff sa130 010000010 0 820000?082ffff 410000?417fff sa175 010101111 0af0 000?0afffff 578000?57ffff sa131 010000011 0 830000?083ffff 418000?41ffff sa176 010110000 0b00 000?0b0ffff 580000?587fff sa132 010000100 0 840000?084ffff 420000?427fff sa177 010110001 0b10 000?0b1ffff 588000?58ffff table 16. s29gl256m sector address table (sheet 2 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 43 data sheet sa178 010110010 0b 20000?0b2ffff 590000?597fff sa223 011011111 0df0 000?0dfffff 6f8000?6fffff sa179 010110011 0b 30000?0b3ffff 598000?59ffff sa224 011100000 0e00 000?0e0ffff 700000?707fff sa180 010110100 0b 40000?0b4ffff 5a0000?5a7fff sa225 011100001 0e10 000?0e1ffff 708000?70ffff sa181 010110101 0b 50000?0b5ffff 5a8000?5affff sa226 011100010 0e20 000?0e2ffff 710000?717fff sa182 010110110 0b 60000?0b6ffff 5b0000?5b7fff sa227 011100011 0e30 000?0e3ffff 718000?71ffff sa183 010110111 0b 70000?0b7ffff 5b8000?5bffff sa228 011100100 0e40 000?0e4ffff 720000?727fff sa184 010111000 0b 80000?0b8ffff 5c0000?5c7fff sa229 011100101 0e50 000?0e5ffff 728000?72ffff sa185 010111001 0b 90000?0b9ffff 5c8000?5cffff sa230 011100110 0e60 000?0e6ffff 730000?737fff sa186 010111010 0ba 0000?0baffff 5d0000?5d7fff sa231 011100111 0e70 000?0e7ffff 738000?73ffff sa187 010111011 0bb 0000?0bbffff 5d8000?5dffff sa232 011101000 0e80 000?0e8ffff 740000?747fff sa188 010111100 0bc 0000?0bcffff 5e0000?5e7fff sa233 011101001 0e90 000?0e9ffff 748000?74ffff sa189 010111101 0bd 0000?0bdffff 5e8000?5effff sa234 011101010 0ea0 000?0eaffff 750000?757fff sa190 010111110 0be 0000?0beffff 5f0000?5f7fff sa235 011101011 0eb0 000?0ebffff 758000?75ffff sa191 010111111 0bf 0000?0bfffff 5f8000?5fffff sa236 011101100 0ec0 000?0ecffff 760000?767fff sa192 011000000 0c 00000?0c0ffff 600000?607fff sa237 011101101 0ed0 000?0edffff 768000?76ffff sa193 011000001 0c 10000?0c1ffff 608000?60ffff sa238 011101110 0ee0 000?0eeffff 770000?777fff sa194 011000010 0c 20000?0c2ffff 610000?617fff sa239 011101111 0ef0 000?0efffff 778000?77ffff sa195 011000011 0c 30000?0c3ffff 618000?61ffff sa240 011110000 0f00 000?0f0ffff 780000?787fff sa196 011000100 0c 40000?0c4ffff 620000?627fff sa241 011110001 0f10 000?0f1ffff 788000?78ffff sa197 011000101 0c 50000?0c5ffff 628000?62ffff sa242 011110010 0f20 000?0f2ffff 790000?797fff sa198 011000110 0c 60000?0c6ffff 630000?637fff sa243 011110011 0f30 000?0f3ffff 798000?79ffff sa199 011000111 0c 70000?0c7ffff 638000?63ffff sa244 011110100 0f40 000?0f4ffff 7a0000?7a7fff sa200 011001000 0c 80000?0c8ffff 640000?647fff sa245 011110101 0f50 000?0f5ffff 7a8000?7affff sa201 011001001 0c 90000?0c9ffff 648000?64ffff sa246 011110110 0f60 000?0f6ffff 7b0000?7b7fff sa202 011001010 0ca 0000?0caffff 650000?657fff sa247 011110111 0f70 000?0f7ffff 7b8000?7bffff sa203 011001011 0cb 0000?0cbffff 658000?65ffff sa248 011111000 0f80 000?0f8ffff 7c0000?7c7fff sa204 011001100 0cc 0000?0ccffff 660000?667fff sa249 011111001 0f90 000?0f9ffff 7c8000?7cffff sa205 011001101 0cd 0000?0cdffff 668000?66ffff sa250 011111010 0fa0 000?0faffff 7d0000?7d7fff sa206 011001110 0ce 0000?0ceffff 670000?677fff sa251 011111011 0fb0 000?0fbffff 7d8000?7dffff sa207 011001111 0cf 0000?0cfffff 678000?67ffff sa252 011111100 0fc0 000?0fcffff 7e0000?7e7fff sa208 011010000 0d 00000?0d0ffff 680000?687fff sa253 011111101 0fd0 000?0fdffff 7e8000?7effff sa209 011010001 0d 10000?0d1ffff 688000?68ffff sa254 011111110 0fe0 000?0feffff 7f0000?7f7fff sa210 011010010 0d 20000?0d2ffff 690000?697fff sa255 011111111 0ff0 000?0ffffff 7f8000?7fffff sa211 011010011 0d 30000?0d3ffff 698000?69ffff sa256 100000000 1000000?100ffff 800000?807fff sa212 011010100 0d 40000?0d4ffff 6a0000?6a7fff sa257 100000001 1010000?101ffff 808000?80ffff sa213 011010101 0d 50000?0d5ffff 6a8000?6affff sa258 100000010 1020000?102ffff 810000?817fff sa214 011010110 0d 60000?0d6ffff 6b0000?6b7fff sa259 100000011 1030000?103ffff 818000?81ffff sa215 011010111 0d 70000?0d7ffff 6b8000?6bffff sa260 100000100 1040000?104ffff 820000?827fff sa216 011011000 0d 80000?0d8ffff 6c0000?6c7fff sa261 100000101 1050000?105ffff 828000?82ffff sa217 011011001 0d 90000?0d9ffff 6c8000?6cffff sa262 100000110 1060000?106ffff 830000?837fff sa218 011011010 0da 0000?0daffff 6d0000?6d7fff sa263 100000111 1070000?107ffff 838000?83ffff sa219 011011011 0db 0000?0dbffff 6d8000?6dffff sa264 100001000 1080000?108ffff 840000?847fff sa220 011011100 0dc 0000?0dcffff 6e0000?6e7fff sa265 100001001 1090000?109ffff 848000?84ffff sa221 011011101 0dd 0000?0ddffff 6e8000?6effff sa266 100001010 10a0 000?10affff 850000?857fff sa222 011011110 0de 0000?0deffff 6f0000?6f7fff sa267 100001011 10b0 000?10bffff 858000?85ffff table 16. s29gl256m sector address table (sheet 3 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range
44 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet sa268 100001100 10c 0000?10cffff 860000?867fff sa313 100111001 1390000?139ffff 9c8000?9cffff sa269 100001101 10d 0000?10dffff 868000?86ffff sa314 100111010 13a0 000?13affff 9d0000?9d7fff sa270 100001110 10e 0000?10effff 870000?877fff sa315 100111011 13b0 000?13bffff 9d8000?9dffff sa271 100001111 10f 0000?10fffff 878000?87ffff sa316 100111100 13c0 000?13cffff 9e0000?9e7fff sa272 100010000 1 100000?110ffff 880000?887fff sa317 100111101 13d0 000?13dffff 9e8000?9effff sa273 100010001 1 110000?111ffff 888000?88ffff sa318 100111110 13e0 000?13effff 9f0000?9f7fff sa274 100010010 1 120000?112ffff 890000?897fff sa319 100111111 13f0 000?13fffff 9f8000?9fffff sa275 100010011 1 130000?113ffff 898000?89ffff sa320 101000000 1400000?140ffff a00000?a07fff sa276 100010100 1 140000?114ffff 8a0000?8a7fff sa321 101000001 1410000?141ffff a08000?a0ffff sa277 100010101 1 150000?115ffff 8a8000?8affff sa322 101000010 1420000?142ffff a10000?a17fff sa278 100010110 1 160000?116ffff 8b0000?8b7fff sa323 101000011 1430000?143ffff a18000?a1ffff sa279 100010111 1 170000?117ffff 8b8000?8bffff sa324 101000100 1440000?144ffff a20000?a27fff sa280 100011000 1 180000?118ffff 8c0000?8c7fff sa325 101000101 1450000?145ffff a28000?a2ffff sa281 100011001 1 190000?119ffff 8c8000?8cffff sa326 101000110 1460000?146ffff a30000?a37fff sa282 100011010 11a 0000?11affff 8d0000?8d7fff sa327 101000111 1470000?147ffff a38000?a3ffff sa283 100011011 11b 0000?11bffff 8d8000?8dffff sa328 101001000 1480000?148ffff a40000?a47fff sa284 100011100 11c 0000?11cffff 8e0000?8e7fff sa329 101001001 1490000?149ffff a48000?a4ffff sa285 100011101 11d 0000?11dffff 8e8000?8effff sa330 101001010 14a0 000?14affff a50000?a57fff sa286 100011110 11e 0000?11effff 8f0000?8f7fff sa331 101001011 14b0 000?14bffff a58000?a5ffff sa287 100011111 11f 0000?11fffff 8f8000?8fffff sa332 101001100 14c0 000?14cffff a60000?a67fff sa288 100100000 1 200000?120ffff 900000?907fff sa333 101001101 14d0 000?14dffff a68000?a6ffff sa289 100100001 1 210000?121ffff 908000?90ffff sa334 101001110 14e0 000?14effff a70000?a77fff sa290 100100010 1 220000?122ffff 910000?917fff sa335 101001111 14f0 000?14fffff a78000?a7ffff sa291 100100011 1 230000?123ffff 918000?91ffff sa336 101010000 1500000?150ffff a80000?a87fff sa292 100100100 1 240000?124ffff 920000?927fff sa337 101010001 1510000?151ffff a88000?a8ffff sa293 100100101 1 250000?125ffff 928000?92ffff sa338 101010010 1520000?152ffff a90000?a97fff sa294 100100110 1 260000?126ffff 930000?937fff sa339 101010011 1530000?153ffff a98000?a9ffff sa295 100100111 1 270000?127ffff 938000?93ffff sa340 101010100 1540000?154ffff aa0000?aa7fff sa296 100101000 1 280000?128ffff 940000?947fff sa341 101010101 1550000?155ffff aa8000?aaffff sa297 100101001 1 290000?129ffff 948000?94ffff sa342 101010110 1560000?156ffff ab0000?ab7fff sa298 100101010 12a 0000?12affff 950000?957fff sa343 101010111 1570000?157ffff ab8000?abffff sa299 100101011 12b 0000?12bffff 958000?95ffff sa344 101011000 1580000?158ffff ac0000?ac7fff sa300 100101100 12c 0000?12cffff 960000?967fff sa345 101011001 1590000?159ffff ac8000?acffff sa301 100101101 12d 0000?12dffff 968000?96ffff sa346 101011010 15a0 000?15affff ad0000?ad7fff sa302 100101110 12e 0000?12effff 970000?977fff sa347 101011011 15b0 000?15bffff ad8000?adffff sa303 100101111 12f 0000?12fffff 978000?97ffff sa348 101011100 15c0 000?15cffff ae0000?ae7fff sa304 100110000 1 300000?130ffff 980000?987fff sa349 101011101 15d0 000?15dffff ae8000?aeffff sa305 100110001 1 310000?131ffff 988000?98ffff sa350 101011110 15e0 000?15effff af0000?af7fff sa306 100110010 1 320000?132ffff 990000?997fff sa351 101011111 15f0 000?15fffff af8000?afffff sa307 100110011 1 330000?133ffff 998000?99ffff sa352 101100000 1600000?160ffff b00000?b07fff sa308 100110100 1 340000?134ffff 9a0000?9a7fff sa353 101100001 1610000?161ffff b08000?b0ffff sa309 100110101 1 350000?135ffff 9a8000?9affff sa354 101100010 1620000?162ffff b10000?b17fff sa310 100110110 1 360000?136ffff 9b0000?9b7fff sa355 101100011 1630000?163ffff b18000?b1ffff sa311 100110111 1 370000?137ffff 9b8000?9bffff sa356 101100100 1640000?164ffff b20000?b27fff sa312 100111000 1 380000?138ffff 9c0000?9c7fff sa357 101100101 1650000?165ffff b28000?b2ffff table 16. s29gl256m sector address table (sheet 4 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 45 data sheet sa358 101100110 1 660000?166ffff b30000?b37fff sa403 110010011 1930000?193ffff c98000?c9ffff sa359 101100111 1 670000?167ffff b38000?b3ffff sa404 110010100 1940000?194ffff ca0000?ca7fff sa360 101101000 1 680000?168ffff b40000?b47fff sa405 110010101 1950000?195ffff ca8000?caffff sa361 101101001 1 690000?169ffff b48000?b4ffff sa406 110010110 1960000?196ffff cb0000?cb7fff sa362 101101010 16a 0000?16affff b50000?b57fff sa407 110010111 1970000?197ffff cb8000?cbffff sa363 101101011 16b 0000?16bffff b58000?b5ffff sa408 110011000 1980000?198ffff cc0000?cc7fff sa364 101101100 16c 0000?16cffff b60000?b67fff sa409 110011001 1990000?199ffff cc8000?ccffff sa365 101101101 16d 0000?16dffff b68000?b6ffff sa410 110011010 19a0 000?19affff cd0000?cd7fff sa366 101101110 16e 0000?16effff b70000?b77fff sa411 110011011 19b0 000?19bffff cd8000?cdffff sa367 101101111 16f 0000?16fffff b78000?b7ffff sa412 110011100 19c0 000?19cffff ce0000?ce7fff sa368 101110000 1 700000?170ffff b80000?b87fff sa413 110011101 19d0 000?19dffff ce8000?ceffff sa369 101110001 1 710000?171ffff b88000?b8ffff sa414 110011110 19e0 000?19effff cf0000?cf7fff sa370 101110010 1 720000?172ffff b90000?b97fff sa415 110011111 19f0 000?19fffff cf8000?cfffff sa371 101110011 1 730000?173ffff b98000?b9ffff sa416 110100000 1a00 000?1a0ffff d00000?d07fff sa372 101110100 1 740000?174ffff ba0000?ba7fff sa417 110100001 1a10 000?1a1ffff d08000?d0ffff sa373 101110101 1 750000?175ffff ba8000?baffff sa418 110100010 1a20 000?1a2ffff d10000?d17fff sa374 101110110 1 760000?176ffff bb0000?bb7fff sa419 110100011 1a30 000?1a3ffff d18000?d1ffff sa375 101110111 1 770000?177ffff bb8000?bbffff sa420 110100100 1a40 000?1a4ffff d20000?d27fff sa376 101111000 1 780000?178ffff bc0000?bc7fff sa421 110100101 1a50 000?1a5ffff d28000?d2ffff sa377 101111001 1 790000?179ffff bc8000?bcffff sa422 110100110 1a60 000?1a6ffff d30000?d37fff sa378 101111010 17a 0000?17affff bd0000?bd7fff sa423 110100111 1a70 000?1a7ffff d38000?d3ffff sa379 101111011 17b 0000?17bffff bd8000?bdffff sa424 110101000 1a80 000?1a8ffff d40000?d47fff sa380 101111100 17c 0000?17cffff be0000?be7fff sa425 110101001 1a90 000?1a9ffff d48000?d4ffff sa381 101111101 17d 0000?17dffff be8000?beffff sa426 110101010 1aa0 000?1aaffff d50000?d57fff sa382 101111110 17e 0000?17effff bf0000?bf7fff sa427 110101011 1ab0 000?1abffff d58000?d5ffff sa383 101111111 17f 0000?17fffff bf8000?bfffff sa428 110101100 1ac0 000?1acffff d60000?d67fff sa384 110000000 1 800000?180ffff c00000?c07fff sa429 110101101 1ad0 000?1adffff d68000?d6ffff sa385 110000001 1 810000?181ffff c08000?c0ffff sa430 110101110 1ae0 000?1aeffff d70000?d77fff sa386 110000010 1 820000?182ffff c10000?c17fff sa431 110101111 1af0 000?1afffff d78000?d7ffff sa387 110000011 1 830000?183ffff c18000?c1ffff sa432 110110000 1b00 000?1b0ffff d80000?d87fff sa388 110000100 1 840000?184ffff c20000?c27fff sa433 110110001 1b10 000?1b1ffff d88000?d8ffff sa389 110000101 1 850000?185ffff c28000?c2ffff sa434 110110010 1b20 000?1b2ffff d90000?d97fff sa390 110000110 1 860000?186ffff c30000?c37fff sa435 110110011 1b30 000?1b3ffff d98000?d9ffff sa391 110000111 1 870000?187ffff c38000?c3ffff sa436 110110100 1b40 000?1b4ffff da0000?da7fff sa392 110001000 1 880000?188ffff c40000?c47fff sa437 110110101 1b50 000?1b5ffff da8000?daffff sa393 110001001 1 890000?189ffff c48000?c4ffff sa438 110110110 1b60 000?1b6ffff db0000?db7fff sa394 110001010 18a 0000?18affff c50000?c57fff sa439 110110111 1b70 000?1b7ffff db8000?dbffff sa395 110001011 18b 0000?18bffff c58000?c5ffff sa440 110111000 1b80 000?1b8ffff dc0000?dc7fff sa396 110001100 18c 0000?18cffff c60000?c67fff sa441 110111001 1b90 000?1b9ffff dc8000?dcffff sa397 110001101 18d 0000?18dffff c68000?c6ffff sa442 110111010 1ba0 000?1baffff dd0000?dd7fff sa398 110001110 18e 0000?18effff c70000?c77fff sa443 110111011 1bb0 000?1bbffff dd8000?ddffff sa399 110001111 18f 0000?18fffff c78000?c7ffff sa444 110111100 1bc0 000?1bcffff de0000?de7fff sa400 110010000 1 900000?190ffff c80000?c87fff sa445 110111101 1bd0 000?1bdffff de8000?deffff sa401 110010001 1 910000?191ffff c88000?c8ffff sa446 110111110 1be0 000?1beffff df0000?df7fff sa402 110010010 1 920000?192ffff c90000?c97fff sa447 110111111 1bf0 000?1bfffff df8000?dfffff table 16. s29gl256m sector address table (sheet 5 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range
46 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet note: all sectors are 64 kbytes or 32 kwords in size. sa448 111000000 1c 00000?1c0ffff e00000?e07fff sa480 111100000 1e00 000?1e0ffff f00000?f07fff sa449 111000001 1c 10000?1c1ffff e08000?e0ffff sa481 111100001 1e10 000?1e1ffff f08000?f0ffff sa450 111000010 1c 20000?1c2ffff e10000?e17fff sa482 111100010 1e20 000?1e2ffff f10000?f17fff sa451 111000011 1c 30000?1c3ffff e18000?e1ffff sa483 111100011 1e30 000?1e3ffff f18000?f1ffff sa452 111000100 1c 40000?1c4ffff e20000?e27fff sa484 111100100 1e40 000?1e4ffff f20000?f27fff sa453 111000101 1c 50000?1c5ffff e28000?e2ffff sa485 111100101 1e50 000?1e5ffff f28000?f2ffff sa454 111000110 1c 60000?1c6ffff e30000?e37fff sa486 111100110 1e60 000?1e6ffff f30000?f37fff sa455 111000111 1c 70000?1c7ffff e38000?e3ffff sa487 111100111 1e70 000?1e7ffff f38000?f3ffff sa456 111001000 1c 80000?1c8ffff e40000?e47fff sa488 111101000 1e80 000?1e8ffff f40000?f47fff sa457 111001001 1c 90000?1c9ffff e48000?e4ffff sa489 111101001 1e90 000?1e9ffff f48000?f4ffff sa458 111001010 1ca 0000?1caffff e50000?e57fff sa490 111101010 1ea0 000?1eaffff f50000?f57fff sa459 111001011 1cb 0000?1cbffff e58000?e5ffff sa491 111101011 1eb0 000?1ebffff f58000?f5ffff sa460 111001100 1cc 0000?1ccffff e60000?e67fff sa492 111101100 1ec0 000?1ecffff f60000?f67fff sa461 111001101 1cd 0000?1cdffff e68000?e6ffff sa493 111101101 1ed0 000?1edffff f68000?f6ffff sa462 111001110 1ce 0000?1ceffff e70000?e77fff sa494 111101110 1ee0 000?1eeffff f70000?f77fff sa463 111001111 1cf 0000?1cfffff e78000?e7ffff sa495 111101111 1ef0 000?1efffff f78000?f7ffff sa464 111010000 1d 00000?1d0ffff e80000?e87fff sa496 111110000 1f00 000?1f0ffff f80000?f87fff sa465 111010001 1d 10000?1d1ffff e88000?e8ffff sa497 111110001 1f10 000?1f1ffff f88000?f8ffff sa466 111010010 1d 20000?1d2ffff e90000?e97fff sa498 111110010 1f20 000?1f2ffff f90000?f97fff sa467 111010011 1d 30000?1d3ffff e98000?e9ffff sa499 111110011 1f30 000?1f3ffff f98000?f9ffff sa468 111010100 1d 40000?1d4ffff ea0000?ea7fff sa500 111110100 1f40 000?1f4ffff fa0000?fa7fff sa469 111010101 1d 50000?1d5ffff ea8000?eaffff sa501 111110101 1f50 000?1f5ffff fa8000?faffff sa470 111010110 1d 60000?1d6ffff eb0000?eb7fff sa502 111110110 1f60 000?1f6ffff fb0000?fb7fff sa471 111010111 1d 70000?1d7ffff eb8000?ebffff sa503 111110111 1f70 000?1f7ffff fb8000?fbffff sa472 111011000 1d 80000?1d8ffff ec0000?ec7fff sa504 111111000 1f80 000?1f8ffff fc0000?fc7fff sa473 111011001 1d 90000?1d9ffff ec8000?ecffff sa505 111111001 1f90 000?1f9ffff fc8000?fcffff sa474 111011010 1da 0000?1daffff ed0000?ed7fff sa506 111111010 1fa0 000?1faffff fd0000?fd7fff sa475 111011011 1db 0000?1dbffff ed8000?edffff sa507 111111011 1fb0 000?1fbffff fd8000?fdffff sa476 111011100 1dc 0000?1dcffff ee0000?ee7fff sa508 111111100 1fc0 000?1fcffff fe0000?fe7fff sa477 111011101 1dd 0000?1ddffff ee8000?eeffff sa509 111111101 1fd0 000?1fdffff fe8000?feffff sa478 111011110 1de 0000?1deffff ef0000?ef7fff sa510 111111110 1fe0 000?1feffff ff0000?ff7fff sa479 111011111 1df 0000?1dfffff ef8000?efffff sa511 111111111 1ff0 000?1ffffff ff8000?ffffff table 16. s29gl256m sector address table (sheet 6 of 6) sector a23?a15 8-bit address range 16-bit address range sector a23?a15 8-bit address range 16-bit address range
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 47 data sheet autoselect mode the autoselect mode provides manufacturer and dev ice identification, and sector group protection verification, through identifier codes output on dq7?dq0. this mode is primarily intended for pro - gramming equipment to automatically match a device to be programmed with its corresponding programming algorithm. however, the autoselect codes can also be accessed in-system through the command register. when using programming equipment, the autoselect mode requires v id on address pin a9. ad - dress pins a6, a3, a2, a1, and a0 must be as shown in ta b l e 17 . in addition, when verifying sector protection, the sector address must appear on the appropriate highest order address bits (see ta b l e 6 through ta b l e 16 ). ta b l e 17 shows the remaining address bits that are don?t care. when all necessary bits are set as required, the programming equipment may then read the corre - sponding identifier code on dq7?dq0. to access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in ta b l e 34 and ta b l e 35 . this method does not require v id . see autoselect command sequence for more information. legend: l = logic low = v il , h = logic high = v ih , sa = sector address, x = don?t care. ta b l e 1 7 . autoselect codes, (high voltage method) description ce# oe# we# a22 to a15 a1 4 to a1 0 a9 a 8 to a 7 a 6 a 5 to a 4 a 3 to a 2 a 1 a 0 dq8 to dq15 dq7 to dq0 model number byte# = v ih byte# = v il r0 r1, r2, r8, r9 r3,r4 r5, r6, r7 manufacturer id : spansion products ll h x x v i d xlxlll 00 x 01 h 01h 01h 01h s29gl256m cycle 1 ll h x x v i d xlx llh 22 x 7eh cycle 2 h h l 22 x 12h cycle 3 h h h 22 x 01h s29gl128m cycle 1 ll h x x v i d xlx llh 22 x 7eh cycle 2 h h l 22 x 12h cycle 3 h h h 22 x 00h s29gl064m cycle 1 ll h x x v i d xlx llh 22 x 7e h 7eh 7eh 7eh cycle 2 hh l 22 x 13 h 0ch 10h 13h cycle 3 hhh 22 x 00 h 01h 00h (-r4, bottom boot) 01h (-r3, top boot) 01h s29gl032m cycle 1 ll h x x v i d xlx llh 22 x 7e h 7eh 7eh 7eh cycle 2 hh l 22 x 1c h 1dh 1ah 1ah cycle 3 hhh 22 x 00 h 00h 00h (-r4, bottom boot) 01h (-r3, top boot) sector group protection verification ll h sa x v i d xlxlhl x x 01h (protected), 00h (unprotected) secured silicon sector indicator bit (dq7), wp# protects highest address sector ll h x x v i d xlxlhh x x 98h (factory locked), 18h (not factory locked) secured silicon sector indicator bit (dq7), wp# protects lowest address sector ll h x x v i d xlxlhh x x 88h (factory locked), 08h (not factory locked)
48 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet sector group protection and unprotection the hardware sector group protection feature disa bles both program and erase operations in any sector group. in this device, a sector group consists of four adjacent sectors that are protected or unprotected at the same time (see ta b l e 4 ). the hardware sector group unprotection feature re-enables both program and erase operations in previously protected sector groups. sector group protection/unprotection can be implemented via two methods. sector protection/unprotection requires v id on the reset# pin only, and can be implemented ei - ther in-system or via programming equipment. figure 2 shows the algorithms and figure 24 shows the timing diagram. this method uses stan dard microprocessor bus cycle timing. for sector group unprotect, all unprotected sector groups must first be protected prior to the first sector group unprotect write cycle. the device is shipped with all sector groups unpr otected. spansion offers the option of program - ming and protecting sector groups at its factory prior to shipping the device through spansion programming service. contact a span sion representative for details. it is possible to determine whether a sector group is protected or unprotected. see autoselect mode for details. note: all sector groups are 256 kwords in size. ta b l e 1 8 . s29gl032m (model r0) sector group protection/unprotection addresses sector group a22?a18 sector group a22?a18 sector group a22?a18 sector group a22?a18 sa0?sa3 00000 sa16?sa19 00100 sa32?sa35 01000 sa48?sa51 01100 sa4?sa7 00001 sa20?sa23 00101 sa36?sa39 01001 sa52?sa55 01101 sa8?sa11 00010 sa24?sa27 00110 sa40?sa43 01010 sa56?sa59 01110 sa12?sa15 00011 sa28?sa31 00111 sa44?sa47 01011 sa60?sa63 01111 ta b l e 1 9 . s29gl032m (models r1, r2) sector group protection/unprotection addresses sector group a20?a15 sector group a20?a15 sector group a20?a15 sector group a20?a15 sa0 000000 sa12?sa15 0011xx sa36?sa39 1001xx sa56?sa59 1110xx sa1 000001 sa16?sa19 0100xx sa40?sa43 1010xx sa60 111100 sa2 000010 sa20?sa23 0101xx sa44?sa47 1011xx sa61 111101 sa3 000011 sa24?sa27 0110xx sa48?sa51 1100xx sa62 111110 sa4?sa7 0001xx sa28?sa31 0111xx sa52?sa55 1101xx sa63 111111 sa8?sa11 0010xx sa32?sa35 1000xx ta b l e 2 0 . s29gl032m (model r3) sector group protection/unprotection address table sector a20?a12 sector/sector block size (kbytes) sector a20?a12 sector/sector block size (kbytes) sector a20?a12 sector/sector block size (kbytes) sa0-sa3 0000xxxxxh 256 (4x64) sa36?sa39 1001xxxxxh 256 (4x64) sa63 111111000h 8 sa4-sa7 0001xxxxxh 256 (4x64) sa40?sa43 1010xxxxxh 256 (4x64) sa64 111111001h 8 sa8-sa11 0010xxxxxh 256 (4x64) sa44?sa47 1011xxxxxh 256 (4x64) sa65 111111010h 8 sa12-sa15 0011xxxxxh 256 (4x64) sa48?sa51 1100xxxxxh 256 (4x64) sa66 111111011h 8 sa16-sa19 0100xxxxxh 256 (4x64) sa52-sa55 1101xxxxxh 256 (4x64) sa67 111111100h 8 sa20-sa23 0101xxxxxh 256 (4x64) sa56-sa59 1110xxxxxh 256 (4x64) sa68 111111101h 8 sa24-sa27 0110xxxxxh 256 (4x64) sa60-sa62 111100xxxh 192 (3x64) sa69 111111110h 8 sa28-sa31 0111xxxxxh 256 (4x64) 111101xxxh sa70 111111111h 8 sa32?sa35 1000xxxxxh 256 (4x64) 111110xxxh
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 49 data sheet l note: all sector groups are 256 kwords in size. ta b l e 2 1 . s29gl032m (model r4) sector group pr otection/unprotection address table sector a20?a12 sector/sector block size (kbytes) sector a20?a12 sector/sector block size (kbytes) sector a20?a12 sa0 000000000h 8 sa8?sa10 000001xxxh 192 (3x64) sa35-sa38 0111xxxxxh 256 (4x64) sa1 000000001h 8 000010xxxh sa39-sa42 1000xxxxxh 256 (4x64) sa2 000000010h 8 000011xxxh sa43-sa46 1001xxxxxh 256 (4x64) sa3 000000011h 8 sa11?sa14 0001xxxxxh 256 (4x64) sa47-sa50 1010xxxxxh 256 (4x64) sa4 000000100h 8 sa15?sa18 0010xxxxxh 256 (4x64) sa51-sa54 1011xxxxxh 256 (4x64) sa5 000000101h 8 sa19?sa22 0011xxxxxh 256 (4x64) sa55?sa58 1100xxxxxh 256 (4x64) sa6 000000110h 8 sa23?sa26 0100xxxxxh 256 (4x64) sa59?sa62 1101xxxxxh 256 (4x64) sa7 000000111h 8 sa27-sa30 0101xxxxxh 256 (4x64) sa63?sa66 1110xxxxxh 256 (4x64) sa31-sa34 0110xxxxxh 256 (4x64) sa67?sa70 1111xxxxxh 256 (4x64) table 22. s29gl064m (model 00) sector gro up protection/unprotection address ta b l e sector group a22?a18 sector group a22?a18 sector group a22?a18 sector group a22?a18 sa0?sa3 00000 sa36?sa39 01001 sa68?sa71 10001 sa100?sa103 11001 sa4?sa7 00001 sa40?sa43 01010 sa72?sa75 10010 sa104?sa107 11010 sa8?sa11 00010 sa44?sa47 01011 sa76?sa79 10011 sa108?sa111 11011 sa12?sa15 00011 sa48?sa51 01100 sa80?sa83 10100 sa112?sa115 11100 sa16?sa19 00100 sa52?sa55 01101 sa88?sa91 10110 sa116?sa119 11101 sa20?sa23 00101 sa56?sa59 01110 sa92?sa95 10111 sa120?sa123 11110 sa24?sa27 00110 sa60?sa63 01111 sa96?sa99 11000 sa124?sa127 11111 sa32?sa35 01000 sa64?sa67 10000 ta b l e 2 3 . s29gl064m (models r1, r2, r8, r9) sector group protection/unprotection addresses sector group a21?a15 sector group a21?a15 sector group a21?a15 sector group a21?a15 sa0 0000000 sa28?sa31 00111xx sa64?sa67 10000xx sa104?sa107 11010xx sa1 0000001 sa32?sa35 01000xx sa68?sa71 10001xx sa108?sa111 11011xx sa2 0000010 sa36?sa39 01001xx sa72?sa75 10010xx sa112?sa115 11100xx sa3 0000011 sa40?sa43 01010xx sa76?sa79 10011xx sa116?sa119 11101xx sa4?sa7 00001xx sa44?sa47 01011xx sa80?sa83 10100xx sa120?sa123 11110xx sa8?sa11 00010xx sa48?sa51 01100xx sa84?sa87 10101xx sa124 1111100 sa12?sa15 00011xx sa52?sa55 01101xx sa88?sa91 10110xx sa125 1111101 sa16?sa19 00100xx sa56?sa59 01110xx sa92?sa95 10111xx sa126 1111110 sa20?sa23 00101xx sa60?sa63 01111xx sa96?sa99 11000xx sa127 1111111 sa24?sa27 00110xx sa28?sa31 00111xx sa100?sa103 11001xx
50 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 2 4 . s29gl064m (model r3) sector group pr otection/unprotection address table sector a21?a12 sector/ sector block size (kbytes) sector a21?a12 sector/ sector block size (kbytes) sector a21?a12 sector/ sector block size (kbytes) sa0-sa3 00000xxxxx 256 (4x64) sa56-sa59 01110xxxxx 256 (4x64) sa112-sa115 11100xxxxx 256 (4x64) sa4-sa7 00001xxxxx 256 (4x64) sa60-sa63 01111xxxxx 256 (4x64) sa116-sa119 11101xxxxx 256 (4x64) sa8-sa11 00010xxxxx 256 (4x64) sa64-sa67 10000xxxxx 256 (4x64) sa120-sa123 11110xxxxx 256 (4x64) sa12-sa15 00011xxxxx 256 (4x64) sa68-sa71 10001xxxxx 256 (4x64) sa124-sa126 1111100xxx 192 (3x64) sa16-sa19 00100xxxxx 256 (4x64) sa72-sa75 10010xxxxx 256 (4x64) 1111101xxx sa20-sa23 00101xxxxx 256 (4x64) sa76-sa79 10011xxxxx 256 (4x64) 1111110xxx sa24-sa27 00110xxxxx 256 (4x64) sa80-sa83 10100xxxxx 256 (4x64) sa127 1111111000 8 sa28-sa31 00111xxxxx 256 (4x64) sa84-sa87 10101xxxxx 256 (4x64) sa128 1111111001 8 sa32-sa35 01000xxxxx 256 (4x64) sa88-sa91 10110xxxxx 256 (4x64) sa129 1111111010 8 sa36-sa39 01001xxxxx 256 (4x64) sa92-sa95 10111xxxxx 256 (4x64) sa130 1111111011 8 sa40-sa43 01010xxxxx 256 (4x64) sa96-sa99 11000xxxxx 256 (4x64) sa131 1111111100 8 sa44-sa47 01011xxxxx 256 (4x64) sa100-sa103 11001xxxxx 256 (4x64) sa132 1111111101 8 sa48-sa51 01100xxxxx 256 (4x64) sa104-sa107 11010xxxxx 256 (4x64) sa133 1111111110 8 sa52-sa55 01101xxxxx 256 (4x64) sa108-sa111 11011xxxxx 256 (4x64) sa134 1111111111 8 ta b l e 2 5 . s29gl064m (model r4) sector group protection/unprotection addresses sector a21?a12 sector/sector block size (kbytes) sector a21?a12 sector/sector block size (kbytes) sector a21?a12 sector/sector block size (kbytes) sa0 0000000000 8 sa23?sa26 00100xxxxx 256 (4x64) sa79?sa82 10010xxxxx 256 (4x64) sa1 0000000001 8 sa27-sa30 00101xxxxx 256 (4x64) sa83?sa86 10011xxxxx 256 (4x64) sa2 0000000010 8 sa31-sa34 00110xxxxx 256 (4x64) sa87?sa90 10100xxxxx 256 (4x64) sa3 0000000011 8 sa35-sa38 00111xxxxx 256 (4x64) sa91?sa94 10101xxxxx 256 (4x64) sa4 0000000100 8 sa39-sa42 01000xxxxx 256 (4x64) sa95?sa98 10110xxxxx 256 (4x64) sa5 0000000101 8 sa43-sa46 01001xxxxx 256 (4x64) sa99?sa102 10111xxxxx 256 (4x64) sa6 0000000110 8 sa47-sa50 01010xxxxx 256 (4x64) sa103?sa106 11000xxxxx 256 (4x64) sa7 0000000111 8 sa51-sa54 01011xxxxx 256 (4x64) sa107?sa110 11001xxxxx 256 (4x64) sa8?sa10 0000001xxx 192 (3x64) sa55?sa58 01100xxxxx 256 (4x64) sa111?sa114 11010xxxxx 256 (4x64) 0000010xxx sa59?sa62 01101xxxxx 256 (4x64) sa115?sa118 11011xxxxx 256 (4x64) 0000011xxx sa63?sa66 01110xxxxx 256 (4x64) sa119?sa122 11100xxxxx 256 (4x64) sa11?sa14 00001xxxxx 256 (4x64) sa67?sa70 01111xxxxx 256 (4x64) sa123?sa126 11101xxxxx 256 (4x64) sa15?sa18 00010xxxxx 256 (4x64) sa71?sa74 10000xxxxx 256 (4x64) sa127?sa130 11110xxxxx 256 (4x64) sa19?sa22 00011xxxxx 256 (4x64) sa75?sa78 10001xxxxx 256 (4x64) sa131?sa134 11111xxxxx 256 (4x64)
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 51 data sheet note: all sector groups are 128 kwords in size. note: all sector groups are 128 kwords in size. ta b l e 2 6 . s29gl064m (model r5) sector group protection/unprotection addresses sector group a21?a17 sector group a21?a17 sector group a21?a17 sector group a21?a17 sector group a21?a17 sa0?sa3 00000 sa28?sa31 00111 sa56?sa59 01110 sa80?sa83 10100 sa104?sa107 11010 sa4?sa7 00001 sa32?sa35 01000 sa60?sa63 01111 sa84?sa87 10101 sa108?sa111 11011 sa8?sa11 00010 sa36?sa39 01001 sa64?sa67 10000 sa88?sa91 10110 sa112?sa115 11100 sa12?sa15 00011 sa40?sa43 01010 sa68?sa71 10001 sa92?sa95 10111 sa116?sa119 11101 sa16?sa19 00100 sa44?sa47 01011 sa72?sa75 10010 sa96?sa99 11000 sa120?sa123 11110 sa20?sa23 00101 sa48?sa51 01100 sa76?sa79 10011 sa100?sa103 11001 sa124?sa127 11111 sa24?sa27 00110 sa52?sa55 01101 ta b l e 2 7 . s29gl064m (models r6, r7) sector gr oup protection/unprotection address sector group a21?a17 sector group a21?a17 sector group a21?a17 sector group a21?a17 sector group a21?a17 sa0?sa3 00000 sa28?sa31 00111 sa56?sa59 01110 sa80?sa83 10100 sa104?sa107 11010 sa4?sa7 00001 sa32?sa35 01000 sa60?sa63 01111 sa84?sa87 10101 sa108?sa111 11011 sa8?sa11 00010 sa36?sa39 01001 sa64?sa67 10000 sa88?sa91 10110 sa112?sa115 11100 sa12?sa15 00011 sa40?sa43 01010 sa68?sa71 10001 sa92?sa95 10111 sa116?sa119 11101 sa16?sa19 00100 sa44?sa47 01011 sa72?sa75 10010 sa96?sa99 11000 sa120?sa123 11110 sa20?sa23 00101 sa48?sa51 01100 sa76?sa79 10011 sa100?sa103 11001 sa124?sa127 11111 sa24?sa27 00110 sa52?sa55 01101 ta b l e 2 8 . s29gl128m sector group protec tion/unprotection addresses sector group a22?a15 sector group a22?a15 sector group a22?a15 sector group a22?a15 sa0 00000000 sa72?sa75 010010xx sa156?sa159 100111xx sa240?sa243 111100xx sa1 00000001 sa76?sa79 010011xx sa160?sa163 101000xx sa244?sa247 111101xx sa2 00000010 sa80?sa83 010100xx sa164?sa167 101001xx sa248?sa251 111110xx sa3 00000011 sa84?sa87 010101xx sa168?sa171 101010xx sa252 11111100 sa4?sa7 000001xx sa88?sa91 010110xx sa172?sa175 101011xx sa253 11111101 sa8?sa11 000010xx sa92?sa95 010111xx sa176?sa179 101100xx sa254 11111110 sa12?sa15 000011xx sa96?sa99 011000xx sa180?sa183 101101xx sa255 11111111 sa16?sa19 000100xx sa100?sa103 011001xx sa184?sa187 101110xx sa20?sa23 000101xx sa104?sa107 011010xx sa188?sa191 101111xx sa24?sa27 000110xx sa108?sa111 011011xx sa192?sa195 110000xx sa28?sa31 000111xx sa112?sa115 011100xx sa196?sa199 110001xx sa32?sa35 001000xx sa116?sa119 011101xx sa200?sa203 110010xx sa36?sa39 001001xx sa120?sa123 011110xx sa204?sa207 110011xx sa40?sa43 001010xx sa124?sa127 011111xx sa208?sa211 110100xx sa44?sa47 001011xx sa128?sa131 100000xx sa212?sa215 110101xx sa48?sa51 001100xx sa132?sa135 100001xx sa216?sa219 110110xx sa52?sa55 001101xx sa136?sa139 100010xx sa220?sa223 110111xx sa56?sa59 001110xx sa140?sa143 100011xx sa224?sa227 111000xx sa60?sa63 001111xx sa144?sa147 100100xx sa228?sa231 111001xx sa64?sa67 010000xx sa148?sa151 100101xx sa232?sa235 111010xx sa68?sa71 010001xx sa152?sa155 100110xx sa236?sa239 111011xx
52 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 2 9 . s29gl256m sector group protection/unprotection addresses sector group a23?a15 sector group a23?a15 sector group a23?a15 sector group a23?a15 sa0 000000000 sa124?sa127 0011111xx sa260?sa263 1000001xx sa392?sa395 1100010xx sa1 000000001 sa128?sa131 0100000xx sa264?sa267 1000010xx sa396?sa399 1100011xx sa2 000000010 sa132?sa135 0100001xx sa268?sa271 1000011xx sa400?sa403 1100100xx sa3 000000011 sa136?sa139 0100010xx sa276?sa279 1000101xx sa404?sa407 1100101xx sa4?sa7 0000001xx sa140?sa143 0100011xx sa276?sa279 1000101xx sa408?sa411 1100110xx sa8?sa11 0000010xx sa144?sa147 0100100xx sa280?sa283 1000110xx sa412?sa415 1100111xx sa12?sa15 0000011xx sa148?sa151 0100101xx sa284?sa287 1000111xx sa416?sa419 1101000xx sa16?sa19 0000100xx sa152?sa155 0100110xx sa288?sa291 1001000xx sa420?sa423 1101001xx sa20?sa23 0000101xx sa156?sa159 0100111xx sa292?sa295 1001001xx sa424?sa427 1101010xx sa24?sa27 0000110xx sa160?sa163 0101000xx sa296?sa299 1001010xx sa428?sa431 1101011xx sa28?sa31 0000111xx sa164?sa167 0101001xx sa300?sa303 1001011xx sa432?sa435 1101100xx sa32?sa35 0001000xx sa168?sa171 0101010xx sa304?sa307 1001100xx sa436?sa439 1101101xx sa36?sa39 0001001xx sa172?sa175 0101011xx sa308?sa311 1001101xx sa440?sa443 1101110xx sa40?sa43 0001010xx sa176?sa179 0101100xx sa312?sa315 1001110xx sa444?sa447 1101111xx sa44?sa47 0001011xx sa180?sa183 0101101xx sa316?sa319 1001111xx sa448?sa451 1110000xx sa48?sa51 0001100xx sa184?sa187 0101110xx sa320?sa323 1010000xx sa452?sa455 1110001xx sa52?sa55 0001101xx sa188?sa191 0101111xx sa324?sa327 1010001xx sa456?sa459 1110010xx sa56?sa59 0001110xx sa192?sa195 0110000xx sa328?sa331 1010010xx sa460?sa463 1110011xx sa60?sa63 0001111xx sa196?sa199 0110001xx sa332?sa335 1010011xx sa464?sa467 1110100xx sa64?sa67 0010000xx sa200?sa203 0110010xx sa336?sa339 1010100xx sa468?sa471 1110101xx sa68?sa71 0010001xx sa204?sa207 0110011xx sa340?sa343 1010101xx sa472?sa475 1110110xx sa72?sa75 0010010xx sa208?sa211 0110100xx sa344?sa347 1010110xx sa476?sa479 1110111xx sa76?sa79 0010011xx sa212?sa215 0110101xx sa348?sa351 1010111xx sa480?sa483 1111000xx sa80?sa83 0010100xx sa216?sa219 0110110xx sa352?sa355 1011000xx sa484?sa487 1111001xx sa84?sa87 0010101xx sa220?sa223 0110111xx sa356?sa359 1011001xx sa488?sa491 1111010xx sa88?sa91 0010110xx sa224?sa227 0111000xx sa360?sa363 1011010xx sa492?sa495 1111011xx sa92?sa95 0010111xx sa228?sa231 0111001xx sa364?sa367 1011011xx sa496?sa499 1111100xx sa96?sa99 0011000xx sa232?sa235 0111010xx sa368?sa371 1011100xx sa500?sa503 1111101xx sa100?sa103 0011001xx sa236?sa239 0111011xx sa372?sa375 1011101xx sa504?sa507 1111110xx sa104?sa107 0011010xx sa240?sa243 0111100xx sa376?sa379 1011110xx sa508 111111100 sa108?sa111 0011011xx sa244?sa247 0111101xx sa380?sa383 1011111xx sa509 111111101 sa112?sa115 0011100xx sa248?sa251 0111110xx sa384?sa387 1100000xx sa510 111111110 sa116?sa119 0011101xx sa252?sa255 0111111xx sa388?sa391 1100001xx sa511 111111111 sa120?sa123 0011110xx sa256?sa259 1000000xx
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 53 data sheet temporary sector group unprotect this feature allows temporary unprotection of previously protected sector groups to change data in-system. the sector group unprotect mode is activated by setting the reset# pin to v id . dur - ing this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses. once v id is removed from the reset# pin, all the previously protected sector groups are protected again. for this feature, figure 1 shows the algorithm, and figure 23 shows the timing diagrams. notes: 1. all protected sector groups unprotected (if wp# = v il , the highest or lowest address sector remains protected for uniform sector devices, the top or bottom two address sectors remains protected for boot sector devices). 2. all previously protected sector groups are protected once again. figure 1. temporary sector group unprotect operation start perform erase or program operations reset# = v ih tem p o ra r y s e c t o r group unprotect completed (note 2) reset# = v id (note 1)
54 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet figure 2. in-system sector group protect/sector group unprotect algorithms sector group protect: write 60h to sector group address with a6?a0 = 0xx0010 set up sector group address wait 150 s verify sector group protect: write 40h to sector group address with a6?a0 = 0xx0010 read from sector group address with a6?a0 = 0xx0010 start plscnt = 1 reset# = v id wait 1 s first write cycle = 60h? data = 01h? remove v id from reset# write reset command sector group protect complete yes yes no plscnt = 25? yes device failed increment plscnt temporary sector group unprotect mode no sector group unprotect: write 60h to sector group address with a6?a0 = 1xx0010 set up first sector group address wait 15 ms verify sector group unprotect: write 40h to sector group address with a6?a0 = 1xx0010 read from sector group address with a6?a0 = 1xx0010 start plscnt = 1 reset# = v id wait 1 s data = 00h? last sector group verified? remove v id from reset# write reset command sector group unprotect complete yes no plscnt = 1000? yes device failed increment plscnt temporary sector group unprotect mode no all sector groups protected? yes protect all sector groups: the indicated portion of the sector group protect algorithm must be performed for all unprotected sector groups prior to issuing the first sector group unprotect address set up next sector group address no yes no yes no no yes no sector group protect algorithm sector group unprotect algorithm first write cycle = 60h? protect another sector group? reset plscnt = 1
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 55 data sheet secured silicon se ctor flash memory region the secured silicon sector feature provides a fl ash memory region that enables permanent part identification through an electronic serial number (esn). the secured silicon sector is 256 bytes in length, and uses a secured silicon sector indicator bit (dq7) to indicate whether or not the secured silicon sector is locked when shipped from the factory. this bit is permanently set at the factory and cannot be changed, which prevents cloning of a factory locked part. this ensures the security of the esn once the product is shipped to the field. the factory offers the device with the secured silicon sector either customer lockable (standard shipping option) or factory locked (contact a spansion sales representative for ordering informa - tion). the customer-lockable version is shipped with the secured silicon sector unprotected, allowing customers to program the sector after receiving the device. the customer-lockable ver - sion also has the secured silicon sector indicator bit permanently set to a ?0.? the factory-locked version is always protected when shipped from th e factory, and has the secured silicon (secured silicon) sector indicator bit permanently set to a ?1.? thus, the secured silicon sector indicator bit prevents customer-lockable devices from being used to replace devices that are factory locked. note: the acc function and unlock bypass modes are not av ailable when the secured silicon sector is enabled. the secured silicon sector address space in this device is allocated as follows: the system accesses the secured silicon sector through a command sequence (see write protect (wp#) ). after the system writes the enter secured silicon sector command sequence, it may read the secured silicon sector by using the addresses normally occupied by the first sector (sa0). this mode of operation continues until the system issues the exit secured silicon sector com - mand sequence, or until power is removed from the device. on power-up, or following a hardware reset, the device reverts to sending commands to sector sa0. customer lockable: secured silicon sector not programmed or protected at the factory unless otherwise specified, the device is shipped such that the customer may program and pro - tect the 256-byte secured silicon sector. the system may program the secured silicon sector using the write-buffer, accelerated and/or unlock bypass methods, in addition to the standard programming command sequence (see com - mand definitions ). programming and protecting the secured silicon se ctor must be used with caution since, once protected, there is no procedure available for unprotecting the secured silicon sector area and none of the bits in the secured silicon sector memory space can be modified in any way. the secured silicon sector area can be protected using one of the following procedures: ? write the three-cycle enter secured silicon se ctor region command sequence, and then fol - low the in-system sector protect algorithm as shown in figure 2 , except that reset# may be at either v ih or v id . this allows in-system protection of the secured silicon sector without raising any device pin to a high voltage. note that this method is only applicable to the se - cured silicon sector. ? write the three-cycle enter secured silicon se ctor region command sequence and then use the alternate method of sector protection de scribed in the ?sector group protection and un - protection? section. once the secured silicon sector is programmed, locked, and verified, the system must write the exit secured silicon sector region command sequence to return to reading and writing within the remainder of the array. secured silicon sector address range standard factory locked expressflash factory locked customer lockable x16 x8 000000h ? 000007h 000000h ? 00000fh esn esn or determined by customer determined by customer 000008h ? 00007fh 000010h ? 0000ffh unavailable determined by customer
56 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet factory locked: secured silicon sector pr ogrammed and protected at the factory in devices with an esn, the secured silicon sector is protected when the device is shipped from the factory. the secured silicon sector cannot be modified in any way. an esn factory locked device has an 16-byte random esn at addresses 000000h?000007h. please contact your sales representative for details on ordering esn factory locked devices. customers may opt to have thei r code programmed by the fact ory through the spansion pro - gramming service (customer factory locked). the devices are then shipped from the factory with the secured silicon sector permanently locked. contact your sales representative for details on using the spansion programming service. write protect (wp#) the write protect function provides a hardware method of protecting the first or last sector group without using v id . write protect is one of two functions provided by the wp#/acc input. if the system asserts v il on the wp#/acc pin, the device disables program and erase functions in the first or last sector group independently of whether those sector groups were protected or unprotected. note that if wp#/acc is at v il when the device is in the standby mode, the maxi - mum input load current is increased ( ta b l e 29 ). note: if the system asserts vih on the wp#/acc pin, the device re verts to whether the first or last sector was previously set to be protected or unprotected using the method described in ?sector group protection and unprotection?. note that wp# has an internal pullup; when unconnected, wp# is at vih. hardware data protection the command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes ( ta b l e 34 and ta b l e 35 contain command definitions). in ad - dition, the following hardware data protection measures prevent accidental erasure or programming, which might otherwise be caused by spurious system level signals during v cc power-up and power-down transi tions, or from system noise. low v cc write inhibit when v cc is less than v lko , the device does not accept any write cycles. this protects data during v cc power-up and power-down. the command register and all internal program/erase circuits are disabled, and the device resets to the read mode. subsequent writes are ignored until v cc is greater than v lko . the system must provide the proper signals to the control pins to prevent un - intentional writes when v cc is greater than v lko . write pulse ?glitch? protection noise pulses of less than 3 ns (typical) on oe#, ce# or we# do not initiate a write cycle. logical inhibit write cycles are inhibited by holding any one of oe# = v il , ce# = v ih or we# = v ih . to initiate a write cycle, ce# and we# must be a logical zero while oe# is a logical one. power-up write inhibit if we# = ce# = v il and oe# = v ih during power up, the device does not accept commands on the rising edge of we#. the internal state machine is automatically reset to the read mode on power-up.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 57 data sheet common flash memory interface (cfi) the common flash interface (cfi) specification outlines device and host system software inter - rogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. software support can then be device-independent, jedec id-indepen - dent, and forward- and backward-compatible for the specified flash device families. flash vendors can standardize their existing interfaces for long-term compatibility. this device enters the cfi query mode when the system writes the cfi query command, 98h, to address 55h, any time the device is ready to re ad array data. the system can read cfi informa - tion at the addresses given in ta b l e 30 through ta b l e 33 . to terminate reading cfi data, the system must write the reset command. the system can also write the cfi query command when the device is in the autoselect mode. the device enters the cfi query mode, and the sy stem can read cfi data at the addresses given in ta b l e 30 through ta b l e 33 . the system must write the reset command to return the device to reading array data. for further information, please refer to the cfi specification and cfi publication 100. alterna - tively, contact your sales representative for copies of these documents. note: cfi data related to vcc and time-outs may differ from actu al vcc and time-outs of the product. please consult the ordering information tables to obtain the vc c range for particular part numbers. see the erase and programming performance table for typical timeout specifications. ta b l e 3 0 . cfi query identification string addresses(x16) addresses(x8) data description 10h 11h 12h 20h 22h 24h 0051h 0052h 0059h query unique ascii string ?qry? 13h 14h 26h 28h 0002h 0000h primary oem command set 15h 16h 2ah 2ch 0040h 0000h address for primary extended table 17h 18h 2eh 30h 0000h 0000h alternate oem command set (00h = none exists) 19h 1ah 32h 34h 0000h 0000h address for alternate oem extended table (00h = none exists) ta b l e 3 1 . system interface string addresses (x16) addresses (x8) data description 1bh 36h 0027h v cc min. (write/erase) d7?d4: volt, d3?d0: 100 millivolt 1ch 38h 0036h v cc max. (write/erase) d7?d4: volt, d3?d0: 100 millivolt 1dh 3ah 0000h v pp min. voltage (00h = no v pp pin present) 1eh 3ch 0000h v pp max. voltage (00h = no v pp pin present) 1fh 3eh 0007h reserved for future use 20h 40h 0007h typical timeout for min. size buffer write 2 n s (00h = not supported) 21h 42h 000ah typical timeout per individual block erase 2 n ms 22h 44h 0000h typical timeout for full chip erase 2 n ms (00h = not supported) 23h 46h 0001h reserved for future use 24h 48h 0005h max. timeout for buffer write 2 n times typical 25h 4ah 0004h max. timeout per individual block erase 2 n times typical 26h 4ch 0000h max. timeout for full chip erase 2 n times typical (00h = not supported)
58 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 3 2 . device geometry definition addresses (x16) addresses (x8) data description 27h 4eh 0019h 0018h 0017h 0016h device size = 2 n byte 19 = 256 mb, 18 = 128 mb, 17 = 64 mb, 16 = 32 mb 28h 29h 50h 52h 000xh 0000h flash device interface descripti on (refer to cfi publication 100) 0000h = x8-only bus devices 0001h = x16-only bus devices 0002h = x8/x16 bus devices 2ah 2bh 54h 56h 0005h 0000h max. number of byte in multi-byte write = 2 n (00h = not supported) 2ch 58h 0001h 0002h number of erase block regions within device (01h = uniform device, 02h = boot device) 2dh 2eh 2fh 30h 5ah 5ch 5eh 60h 00xxh 000xh 00x0h 000xh erase block region 1 information (refer to the cfi specification or cfi publication 100) 003fh, 0000h, 0000h, 0001h = 32 mb (-r0, -r1, -r2, r5, r6) 007fh, 0000h, 0020h, 0000h = 32 mb (-r3, -r4), 64 mb (-r3, -r4) 007fh, 0000h, 0000h, 0001h = 64 mb (-r 0, -r1, -r2, -r5, -r6, -r7) 00ffh, 0000h, 0000h, 0001h = 128 mb 00ffh, 0001h, 0000h, 0001h = 256 mb 31h 32h 33h 34h 60h 64h 66h 68h 00xxh 0000h 0000h 000xh erase block region 2 information (refer to cfi publication 100) 003eh, 0000h, 0000h, 0001h = 32 mb (-r1, -r2) 007eh, 0000h, 0000h, 0001h = 64 mb (-r1, -r2) 0000h, 0000h, 0000h, 0000h = all others 35h 36h 37h 38h 6ah 6ch 6eh 70h 0000h 0000h 0000h 0000h erase block region 3 information (refer to cfi publication 100) 39h 3ah 3bh 3ch 72h 74h 76h 78h 0000h 0000h 0000h 0000h erase block region 4 information (refer to cfi publication 100)
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 59 data sheet ta b l e 3 3 . primary vendor-specific extended query addresses (x16) addresses (x8) data description 40h 41h 42h 80h 82h 84h 0050h 0052h 0049h query-unique ascii string ?pri? 43h 86h 0031h major version number, ascii 44h 88h 0033h minor version number, ascii 45h 8ah 000xh address sensitive unlock (bits 1-0) 0 = required, 1 = not required process technology (bits 7-2) 0010b = 0.23 m mirrorbit 0009h = x8-only bus devices 0008h = all other devices 46h 8ch 0002h erase suspend 0 = not supported, 1 = to read only, 2 = to read & write 47h 8eh 0001h sector protect 0 = not supported, x = number of sectors in per group 48h 90h 0001h sector temporary unprotect 00 = not supported, 01 = supported 49h 92h 0004h sector protect/unprotect scheme 0004h = standard mode (refer to text) 4ah 94h 0000h simultaneous operation 00 = not supported, x = number of sectors in bank 4bh 96h 0000h burst mode type 00 = not supported, 01 = supported 4ch 98h 0001h page mode type 00 = not supported, 01 = 4 word page, 02 = 8 word page 4dh 9ah 00b5h acc (acceleration) supply minimum 00h = not supported, d7-d4: volt, d3-d0: 100 mv 4eh 9ch 00c5h acc (acceleration) supply maximum 00h = not supported, d7-d4: volt, d3-d0: 100 mv 4fh 9eh 00xxh top/bottom boot sector flag 00h = uniform device without wp# protect, 02h = bottom boot device, 03h = top boot device, 04h = uniform sectors bottom wp# protect, 05h = uniform sectors top wp# protect 50h a0h 0001h program suspend< 00h = not supported, 01h = supported
60 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet command definitions writing specific address and data commands or sequences into the command register initiates device operations. ta b l e 34 and ta b l e 35 define the valid register command sequences. writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. a reset command is then required to return the device to reading array data. all addresses are latched on the falling edge of we # or ce#, whichever happens later. all data is latched on the rising edge of we# or ce#, whichever happens first. see ac characteristics for timing diagrams. reading array data the device is automatically set to reading array data after device power-up. no commands are required to retrieve data. the de vice is ready to read array data after completing an embedded program or embedded erase algorithm. after the device accepts an erase suspend command, the device enters the erase-suspend-read mode, after which the system can read data from any non-erase-suspended sector. after com - pleting a programming operation in the erase suspend mode, the system may once again read array data with the same exception. see erase suspend/erase resume commands for more information. the system must issue the reset command to return the device to the read (or erase-suspend- read) mode if dq5 goes high during an active pr ogram or erase operation, or if the device is in the autoselect mode. see the next section, reset command, for more information. see also requirements for reading array data in the device bus operations section for more in - formation. the read-only operations? ac characteristics provides the read parameters, and figure 13 shows the timing diagram. reset command writing the reset command resets the device to the read or erase-suspend-read mode. address bits are don?t cares for this command. the reset command may be written between the sequence cycles in an erase command sequence before erasing begins. this resets the device to the read mode. once erasure begins, however, the device ignores reset commands until the operation is complete. the reset command may be written between the sequence cycles in a program command se - quence before programming begins. this resets the device to the read mode. if the program command sequence is written while the device is in the erase suspend mode, writing the reset command returns the device to the erase-suspend-read mode. once programming begins, how - ever, the device ignores reset commands until the operation is complete. the reset command may be written between the sequence cycles in an autoselect command se - quence. once in the autoselect mode, the reset command must be written to return to the read mode. if the device entered the autoselect mode while in the erase suspend mode, writing the reset command returns the device to the erase-suspend-read mode. if dq5 goes high during a program or erase operation, writing the reset command returns the device to the read mode (or erase-suspend-read mode if the device was in erase suspend). note that if dq1 goes high during a write buffer programming operation, the system must write the write-to-buffer-abort reset command sequence to reset the device fo r the next operation.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 61 data sheet autoselect command sequence the autoselect command sequence allows the host system to read several identifier codes at spe - cific addresses: note: 3.the device id is read over three cycles. sa = sector address the autoselect command sequence is initiated by first writing two unlock cycles. this is followed by a third write cycle that contains the autose lect command. the device then enters the autose - lect mode. the system may read at any address any number of times without initiating another autoselect command sequence: the system must write the reset command to return to the read mode (or erase-suspend-read mode if the device was previously in erase suspend). enter/exit secured silicon sector command sequence the secured silicon sector region provides a secured data area containing an 8-word/16-byte random electronic serial number (esn). the system can access the secured silicon sector region by issuing the three-cycle enter secured silicon sector command sequence. the device continues to access the secured silicon sector region until the system issues the four-cycle exit secured silicon sector command sequence. the exit secured silicon sector command sequence returns the device to normal operation. ta b l e 34 and ta b l e 35 show the address and data requirements for both command sequences. also, see secured silicon sector flash memory region for further information. note that the acc function and unlock bypass modes are not available when the se - cured silicon sector is enabled. word program co mmand sequence programming is a four-bus-cycle operation. the program command sequence is initiated by writ - ing two unlock write cycles, followed by the pr ogram set-up command. the program address and data are written next, which in turn initiate the embedded program algorithm. the system is not required to provide further controls or timings. the device automatically provides internally gen - erated program pulses and verifies the programmed cell margin. ta b l e 34 and ta b l e 35 show the address and data requirements for the word program command sequence, respectively. when the embedded program algorithm is complete , the device then returns to the read mode and addresses are no longer latched. the system can determine the status of the program oper - ation by using dq7 or dq6. see write operation status for information on these status bits. any commands written to the device during the embedded program algorithm are ignored. note that the secured silicon sector, autoselect, and cfi functions are unavailable when a program oper - ation is in progress. note that a hardware reset immediately terminates the program operation. the program command sequence should be reinitiated once the device returns to the read mode, to ensure data integrity. programming is allowed in any sequence of address locations and across sector boundaries. pro - gramming to the same word address multiple times without intervening erases (incremental bit programming) requires a modified programming method. for such application requirements, please contact your local spansion representative . word programming is supported for backward compatibility with existing flash driver software and for occasional writing of individual words. use of write buffer programming (see below) is st rongly recommended for general programming use when more than a few words are to be programmed. the effectiv e word programming time using write buffer programming is approximately four times shorter than the single word programming time. identifier code a7:a0 (x16) a6:a-1 (x8) manufacturer id 00h 00h device id, cycle 1 01h 02h device id, cycle 2 0eh 1ch device id, cycle 3 0fh 1eh secured silicon sector factory protect 03h 06h sector protect verify (sa)02h (sa)04h
62 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet any bit in a word cannot be programmed from ?0? back to a ?1.? attempting to do so may cause the device to set dq5=1, or cause dq7 and dq6 status bits to indicate the operation was successful. however, a succeeding read shows that the data is still ?0.? only erase operations can convert a ?0? to a ?1.? unlock bypass command sequence the unlock bypass feature allows the system to program words to the device faster than using the standard program command sequence. the unlock bypass command sequence is initiated by first writing two unlock cycles. this is followed by a third write cycle containing the unlock bypass command, 20h. the device then enters the unloc k bypass mode. a two-cycle unlock bypass mode command sequence is all that is required to program in this mode. the first cycle in this sequence contains the unlock bypass program command, a0h; the second cycle contains the program ad - dress and data. additional data is programmed in the same manner. this mode dispenses with the initial two unlock cycles required in the standard program command sequence, resulting in faster total programming time. ta b l e 34 and ta b l e 35 show the requirements for the command sequence. during the unlock bypass mode, only the unlock bypass program and unlock bypass reset com - mands are valid. to exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command sequence. the first cycle must contain the data 90h. the second cycle must contain the data 00h. the device then returns to the read mode. write buffer programming write buffer programming allows the system write to a maximum of 16 words/32 bytes in one programming operation. this results in faster e ffective programming time than the standard pro - gramming algorithms. the write buffer programmi ng command sequence is initiated by first writing two unlock cycles. this is followed by a third write cycle containing the write buffer load command written at the sector address in which programming occurs. the fourth cycle writes the sector address and the number of word locations, minus one, to be programmed. for example, if the system programs six unique address locations, then 05h should be written to the device. this tells the device how many write buffer addresses are loaded with data and therefore when to ex - pect the program buffer to flash command. the number of locations to program cannot exceed the size of the write buffer or the operation aborts. the fifth cycle writes the first address location and data to be programme d. the write-buffer-page is selected by address bits a max ?a 4 . all subsequent address/data pairs must fall within the se - lected-write-buffer-page. the system then writes the remaining address/data pairs into the write buffer. write buffer locations may be loaded in any order. the write-buffer-page address must be the same fo r all address/data pairs loaded into the write buffer. (this means write buffer programming cannot be performed across multiple write-buffer pages.) this also means that write buffer programming cannot be performed across multiple sec - tors. if the system attempts to load programming data outside of the selected write-buffer page, the operation aborts. note that if a write buffer address location is loaded multiple times, the address/data pair counter is decremented for every data load operation. the host system must therefore account for loading a write-buffer location more than once. the counter decrements for each data load operation, not for each unique write-buffer-address location. note also that if an address location is loaded more than once into the buffer, the final data loaded for that address is programmed. once the specified number of write buffer location s are loaded, the system must then write the program buffer to flash command at the sector address. any other address and data combination aborts the write buffer programming operation. the device then begins programming. data poll - ing should be used while monitoring the last address location loaded into the write buffer. dq7, dq6, dq5, and dq1 should be monitored to de termine the device status during write buffer programming. the write-buffer programming operation can be suspended using the standard program suspend/ resume commands. upon successful completion of the write buffer programming operation, the device is ready to execute the next command. the write buffer programming sequence ca n be aborted in the following ways: ? load a value that is greater than the page buffe r size during the number of locations to pro - gram step.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 63 data sheet ? write to an address in a sector different than the one specified during the write-buffer-load command. ? write an address/data pair to a different wr ite-buffer-page than the one selected by the starting address during the write buffer data loading stage of the operation. ? write data other than the confirm command afte r the specified number of data load cycles. the abort condition is indicated by dq1 = 1, dq7 = data# (for the last address location loaded), dq6 = toggle, and dq5=0. a write-to-buffer-abort reset command sequence must be written to reset the device for the next operation. note that the secured silicon sector, autoselect, and cfi functions are unavailable when a pro - gram operation is in progress. this flash device is capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases. for applications requiring incremental bit programming , a modified programming method is required; please contact your local spansion representative. any bit in a write buffer address range cannot be programmed fr om ?0? back to a ?1.? attempting to do so can cause the device to set dq5=1, of cause the dq7 and dq6 status bits to indicate the operation was successful. how - ever, a succeeding read shows that the data is still ?0.? only erase operations can convert a ?0? to a ?1.? accelerated program the device offers acce lerated program operations through the wp#/acc or acc pin depending on the particular product. when the system asserts v hh on the wp#/acc or acc pin. the device uses the higher voltage on the wp#/acc or acc pin to accelerate the operation. note that the wp#/ acc pin must not be at v hh for operations other than accelerated programming, or device damage can result. wp# has an internal pullup; when unconnected, wp# is at v ih . figure 3 illustrates the algorithm for the program operation. see erase and program operations? s29gl032m only and ac characteristics for parameters, and figure 14 for timing diagrams.
64 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet figure 3. write buffer programming operation write ?write to buffer? command and sector address write number of addresses to program minus 1(wc) and sector address write program buffer to flash sector address write first address/data write to a different sector address fail or abort pa s s read dq7 - dq0 at last loaded address read dq7 - dq0 with address = last loaded address write next address/data pair wc = wc - 1 wc = 0 ? part of ?write to buffer? command sequence ye s ye s ye s ye s ye s ye s no no no no no no abort write to buffer operation? dq7 = data? dq7 = data? dq5 = 1? dq1 = 1? write to buffer aborted. must write ?write-to-buffer abort reset? command sequence to return to read mode. (note 2) (note 3) (note 1) notes: 1. when sector address is specified, any address in the selected sector is acceptable. however, when loading write-buffer address locations with data, all addresses must fall within the selected write-buffer page. 2. dq7 may change simultaneously with dq5. therefore, dq7 should be verified. 3. if this flowchart location was reached because dq5= ?1?, then the device failed. if this flowchart location was reached because dq1= ?1?, then the write to buffer operation was aborted. in either case, the proper reset command must be written before the device can begin another operation. if dq1=1, write the write-buffer-programming- abort-reset command. if dq5=1, write the reset command. 4. see table 34 and table 35 for command sequences required for write buffer programming.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 65 data sheet note: see table 34 and table 35 for program command sequence figure 4. program operation program suspend/program resume command sequence the program suspend command allows the system to interrupt a programming operation or a write to buffer programming operation so that data can be read from any non-suspended sector. when the program suspend command is written du ring a programming process, the device halts the program operation within 15 s maximum (5 s typical) and updates the status bits. ad - dresses are not required when writing the program suspend command. after the programming operation is suspended, the system can read array data from any non- suspended sector. the program suspend command can also be issued during a programming op - eration while an erase is suspended. in this case, data can be read from any addresses not in erase suspend or program suspend. if a read is needed from the secured silicon sector area (one-time program area), then user must use the proper command sequences to enter and exit this region. note that the secured silicon sector, autoselect, and cfi functions are unavailable when a program operation is in progress. the system can also write the autoselect command sequence when the device is in the program suspend mode. the system can read as many autoselect codes as required. when the device exits the autoselect mode, the device reverts to the program suspend mode, and is ready for an - other valid operation. see autoselect command sequence for more information. after the program resume command is written, the device reverts to programming. the system can determine the status of the program operation using the dq7 or dq6 status bits, just as in the standard program operation. see write operation status for more information. the system must write the program resume command (address bits are don?t care) to exit the program suspend mode and continue the programmi ng operation. further writes of the resume command are ignored. another program suspend command can be written after the device re - sumes programming. start write program command sequence data poll from system verify data? no yes last address? no yes programming completed increment address embedded program algorithm in progress
66 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet figure 5. program suspend/program resume chip erase command sequence chip erase is a six bus cycle operation. the chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command . two additional unlock write cycles are then followed by the chip erase command, which in turn invokes the embedded erase algorithm. the device does not require the system to preprogram prio r to erase. the embedded erase algorithm automatically preprograms and verifies the entire memory for an all zero data pattern prior to electrical erase. the system is not required to provide any controls or timings during these oper - ations. ta b l e 34 and ta b l e 35 show the address and data requirements for the chip erase command sequence. when the embedded erase algorithm is complete, the device returns to the read mode and ad - dresses are no longer latched. the system can determine the status of the erase operation by using dq7, dq6, or dq2. see write operation status for information on these status bits. any commands written during the chip erase operation are ignored. however, note that a hard - ware reset immediately terminates the erase operation. if that occurs, the chip erase command sequence should be reinitiated once the device returns to reading array data, to ensure data integrity. figure 6 illustrates the algorithm for the erase operation. see erase and programming perfor - mance in ac characteristics for parameters, and figure 18 for timing diagrams. sector erase command sequence sector erase is a six bus cycle operation. the sector erase command sequence is initiated by writ - ing two unlock cycles, followed by a set-up command. two additional unlock cycles are written, and are then followed by the address of the sect or to be erased, and the sector erase command. ta b l e 34 and ta b l e 35 shows the address and data requirements for the sector erase command sequence. program operation or write-to-buffer sequence in progress write program suspend command sequence command is also valid for erase-suspended-program operations autoselect and secsi sector read operations are also allowed data cannot be read from erase- o r program-suspended sectors write program resume command sequence read data as required done reading? no yes write address/data xxxh/30h device reverts to operation prior to program suspend write address/data xxxh/b0h wait 15 s
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 67 data sheet the device does not require the system to preprogram prior to erase. the embedded erase algo - rithm automatically programs and verifies the entire memory for an all zero data pattern prior to electrical erase. the system is not required to provide any controls or timings during these operations. after the command sequence is written, a sector erase time-out of 50 s occurs. during the time- out period, additional sector addresses and sector erase commands can be written. loading the sector erase buffer can be done in any sequence, and the number of sectors can be from one sector to all sectors. the time between these additional cycles must be less than 50 s, otherwise erasure may begin. any sector erase address an d command following the exceeded time-out can or cannot be accepted. it is recommended that processor interrupts be disabled during this time to ensure all commands are accepted. the interrupts can be re-enabled after the last sector erase command is written. any command other than sector erase or erase suspend during the time-out period resets the device to the read mode. note that the secured silicon sector, autoselect, and cfi functions are unavailable when an erase operation is in progress . the system must rewrite the command sequence and any additional addresses and commands. the system can monitor dq3 to determine if the se ctor erase timer has timed out (see the section on dq3: sector erase timer.). the time-out begins from the rising edge of the final we# pulse in the command sequence. when the embedded erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. the system can determine the status of the erase operation by reading dq7, dq6, or dq2 in the erasing sector. see write operation status for information on these status bits. once the sector erase operation starts, only the erase suspend command is valid. all other com - mands are ignored. however, note that a hardware reset immediately terminates the erase operation. if that occurs, the sector erase command sequence should be reinitiated once the de - vice returns to reading array data, to ensure data integrity. figure 6 illustrates the algorithm for the erase operation. see erase and programming perfor - mance in ac characteristics for parameters, and figure 18 for timing diagrams. l notes: 1. see table 34 and table 35 for program command sequence. 2. see dq3: sector erase timer for information on the sector erase timer. figure 6. erase operation start write erase command sequence (notes 1, 2) data poll to erasing bank from system data = ffh? no yes erasure completed embedded erase algorithm in progress
68 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet erase suspend/erase resume commands the erase suspend command, b0h, allows the system to interrupt a sector erase operation and then read data from, or program data to, any se ctor not selected for erasure. this command is valid only during the sector erase operation, includ ing the 50 s time-out period during the sector erase command sequence. the erase suspend command is ignored if written during the chip erase operation or embedded program algorithm. when the erase suspend command is written during the sector erase operation, the device re - quires a typical of 5 s ( maximum of 20 s) to suspend the erase operation. however, when the erase suspend command is written during the sect or erase time-out, the device immediately ter - minates the time-out period and suspends the erase operation. after the erase operation is suspended, the devi ce enters the erase-suspend-read mode. the sys - tem can read data from or program data to any sector not selected for erasure. (the device ?erase suspends? all sectors selected for erasure.) reading at any address within erase-suspended sec - tors produces status information on dq7?dq0. the system can use dq7, or dq6 and dq2 together, to determine if a sector is actively erasing or is erase-suspended. see write operation status for information on these status bits. after an erase-suspended program operation is complete, the device returns to the erase-sus - pend-read mode. the system can determine the status of the program operation using the dq7 or dq6 status bits, just as in the standard word program operation. see write operation status for more information. in the erase-suspend-read mode, the system can also issue the autoselect command sequence. see autoselect mode and autoselect command sequence for details. to resume the sector erase operation, the system must write the erase resume command. fur - ther writes of the resume command are igno red. another erase suspend command can be written after the chip resumes erasing. note: during an erase operation, this flash device performs mult iple internal operations which are invisible to the system. when an erase operation is suspended, any of the internal oper ations that were not fully comp leted must be restarted. as such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress are impeded as a function of the number of suspends. the result is a long er cumulative erase time than without suspends. note that the additional suspends do not affe ct device reliability or future performance. in most systems rapid erase/suspend activity occurs only briefly. in such cases, erase performance is not significantly impacted.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 69 data sheet command definitions ta b l e 3 4 . command definitions( x16 mode, byte# = v ih ) command sequence ( note 1 ) cycles bus cycles (notes 2 ? 5 ) first second third fourth fifth sixth addr data addr data addr data addr data addr data addr data read ( 6 ) 1ra rd reset ( 7 ) 1 xxx f0 autoselect (note 8) manufacturer id 4 555 aa 2aa 55 555 90 x00 0001 device id ( 9 ) 4 555 aa 2aa 55 555 90 x01 227e x0e ( note 18 ) x0f ( note 18 ) secured silicon sector factory protect ( 10 ) 4 555 aa 2aa 55 555 90 x03 ( note 10 ) sector group protect verify ( 12 ) 4 555 aa 2aa 55 555 90 (sa)x02 00/01 enter secured silic on sector region 3 555 aa 2aa 55 555 88 exit secured silic on sector region 4 555 aa 2aa 55 555 90 xxx 00 program 4 555 aa 2aa 55 555 a0 pa pd write to buffer ( 11 ) 3 555 aa 2aa 55 sa 25 sa wc pa pd wbl pd program buffer to flash 1sa 29 write to buffer abort reset ( 13 ) 3 555 aa 2aa 55 555 f0 unlock bypass 3 555 aa 2aa 55 555 20 unlock bypass program ( 14 ) 2 xxx a0 pa pd unlock bypass reset ( 15 ) 2 xxx 90 xxx 00 chip erase 6 555 aa 2aa 55 555 80 555 aa 2aa 55 555 10 sector erase 6 555 aa 2aa 55 555 80 555 aa 2aa 55 sa 30 program/erase suspend ( 16 ) 1 xxx b0 program/erase resume ( 16 ) 1 xxx 30 cfi query ( 18 ) 155 98 legend: x = don?t care ra = read address of memory location to be read. rd = read data read from location ra during read operation. pa = program address. addresses latch on falling edge of we# or ce# pulse, whichever happens later. pd = program data for location pa. data latches on rising edge of we# or ce# pulse, wh ichever happens first. sa = sector address of sector to be verified (in autoselect mode) or erased. address bits a21?a15 un iquely select any sector. wbl = write buffer location. address must be within same write buffer page as pa. wc = word count. number of write buffer locations to load minus 1. notes: 1. see table 1 for description of bus operations. 2. all values are in hexadecimal. 3. shaded cells indicate read cycles. all others are write cycles. 4. during unlock and command cycl es, when lower address bits are 555 or 2aa as shown in table, address bits above a11 and data bits above dq7 are don?t care. 5. no unlock or command cycles re quired when device is in read mode. 6. reset command is required to re turn to read mode (or to erase- suspend-read mode if previously in erase suspend) when device is in autoselect mode, or if dq5 goes high while device is providing status information. 7. fourth cycle of the autoselect command sequence is a read cycle. data bits dq15?dq8 are don?t care. except for rd, pd and wc. see autoselect command sequence for more information. 8. device id must be read in three cycles. 9. if wp# protects highest address sector, data is 98h for factory locked and 18h for not factory locked. if wp# protects lowest address sector, data is 88h for factory locked and 08h for not factor locked. 10. data is 00h for an unprotected sector group and 01h for a protected sector group. 11. total number of cycles in command sequence is determined by number of words written to write buffer. maximum number of cycles in command sequence is 21, including ?program buffer to flash? command. 12. command sequence resets device for next command after aborted write-to-buffer operation. 13. unlock bypass command is requ ired prior to unlock bypass program command. 14. unlock bypass reset command is required to return to read mode when device is in unlock bypass mode. 15. system may read and program in non-erasing sectors, or enter autoselect mode, when in erase suspend mode. erase suspend command is valid only during a sector erase operation. 16. erase resume command is valid only during erase suspend mode. 17. command is valid when device is ready to read array data or when device is in autoselect mode. 18. refer to table 17 , autoselect codes for individual device ids per device density and model number.
70 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ta b l e 3 5 . command definitions (x8 mode, byte# = v il ) command sequence ( note 1 ) cycles bus cycles (notes 2 ? 5 ) first second third fourth fifth sixth addr data addr data addr data addr data addr data addr data read ( 6 ) 1ra rd reset ( 7 ) 1xxx f0 autoselect ( note 8 ) manufacturer id 4 aaa aa 555 55 aaa 90 x00 01 device id ( 9 ) 4 aaa aa 555 55 aaa 90 x02 7e x1c ( note 17 )x1e( note 17 ) secured silicon sector factory protect ( 10 ) 4 aaa aa 555 55 aaa 90 x06 ( note 10 ) sector group protect verify ( 12 ) 4 aaa aa 555 55 aaa 90 (sa)x04 00/01 enter secured silic on sector region 3 aaa aa 555 55 aaa 88 exit secured silic on sector region 4 aaa aa 555 55 aaa 90 xxx 00 write to buffer ( 11 ) 3aaa aa 555 55 sa 25 sa bc pa pd wbl pd program buffer to flash 1sa 29 write to buffer abort reset ( 13 ) 3 aaa aa 555 55 aaa f0 chip erase 6 aaa aa 555 55 aaa 80 aaa aa 555 55 aaa 10 sector erase 6 aaa aa 555 55 aaa 80 aaa aa 555 55 sa 30 program/erase suspend ( 14 ) 1xxx b0 program/erase resume ( 15 ) 1xxx 30 cfi query ( 16 ) 1aa 98 legend: x = don?t care ra = read address of memory location to be read. rd = read data read from location ra during read operation. pa = program address. addresses latch on falling edge of we# or ce# pulse, whichever happens later. pd = program data for location pa. data latches on rising edge of we# or ce# pulse, wh ichever happens first. sa = sector address of sector to be verified (in autoselect mode) or erased. address bits a21?a15 un iquely select any sector. wbl = write buffer location. address must be within same write buffer page as pa. bc = byte count. number of write buffer locations to load minus 1. notes: 1. see table 1 for description of bus operations. 2. all values are in hexadecimal. 3. shaded cells indicate read cycles. all others are write cycles. 4. during unlock and command cycl es, when lower address bits are 555 or aaa as shown in table, address bits above a11 are don?t care. 5. unless otherwise noted, addre ss bits a21?a11 are don?t cares. 6. no unlock or command cycles re quired when device is in read mode. 7. reset command is required to re turn to read mode (or to erase- suspend-read mode if previously in erase suspend) when device is in autoselect mode, or if dq5 goes high while device is providing status information. 8. fourth cycle of autoselect command sequence is a read cycle. data bits dq15?dq8 are don?t care. see autoselect command sequence section or more information. 9. device id must be read in three cycles. 10. if wp# protects highest address sector, data is 98h for factory locked and 18h for not factory locked. if wp# protects lowest address sector, data is 88h for factory locked and 08h for not factor locked. 11. data is 00h for an unprotected sector group and 01h for a protected sector group. 12. total number of cycles in command sequence is determined by number of bytes written to write buffer. maximum number of cycles in command sequence is 37, including ?program buffer to flash? command. 13. command sequence resets device for next command after aborted write-to-buffer operation. 14. system may read and program in non-erasing sectors, or enter autoselect mode, when in erase suspend mode. erase suspend command is valid only during a sector erase operation. 15. erase resume command is valid only during erase suspend mode. 16. command is valid when device is ready to read array data or when device is in autoselect mode. 17. refer to table 17 , autoselect codes for individual device ids per device density and model number.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 71 data sheet write operation status the device provides several bits to determine the status of a program or erase operation: dq2, dq3, dq5, dq6, and dq7. ta b l e 36 and the following subsections de scribe the function of these bits. dq7 and dq6 each offer a method for determ ining whether a program or erase operation is complete or in progress. the device also provides a hardware-based output signal, ry/by#, to determine whether an embedded program or eras e operation is in progress or is completed. dq7: data# polling the data# polling bit, dq7, indicates to the host system whether an embedded program or erase algorithm is in progress or completed, or whethe r the device is in erase suspend. data# polling is valid after the rising edge of the final we# pulse in the command sequence. during the embedded program algorithm, the device outputs on dq7 the complement of the datum programmed to dq7. this dq7 status also applies to programming during erase suspend. when the embedded program algorithm is comp lete, the device outputs the datum programmed to dq7. the system must provide the program addr ess to read valid status information on dq7. if a program address falls within a protected sector, data# polling on dq7 is active for approxi - mately 1 s, then the device returns to the read mode. during the embedded erase algorithm, data# po lling produces a ?0? on dq7. when the embed - ded erase algorithm is complete, or if the device enters the erase suspend mode, data# polling produces a ?1? on dq7. the system must provide an address within any of the sectors selected for erasure to read valid status information on dq7. after an erase command sequence is written, if all sectors selected for erasing are protected, data# polling on dq7 is active for approximately 100 s, then the device returns to the read mode. if not all selected sectors are protected, the embedded erase algorithm erases the unpro - tected sectors, and ignores the selected sectors that are protected. however, if the system reads dq7 at an address within a protected sector, the status may not be valid. just prior to the completion of an embedded program or erase operation, dq7 can change asyn - chronously with dq0?dq6 while output enable (oe#) is asserted low. that is, the device can change from providing status information to vali d data on dq7. depending on when the system samples the dq7 output, it can read the status or valid data. even if the device has completed the program or erase operation and dq7 has valid data, the data outputs on dq0?dq6 may be still invalid. valid data on dq0?dq7 appears on successive read cycles. ta b l e 36 shows the outputs for data# polling on dq7. figure 7 shows the data# polling algo - rithm. figure 17 shows the data# polling timing diagram.
72 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet notes: 1. va = valid address for programming. during a se ctor erase operation, a valid address is any sector address within the sector being erased. during chip erase, a valid address is any non-protected sector address. 2. dq7 should be rechecked even if dq5 = ?1? because dq7 can change simultaneously with dq5. figure 7. data# polling algorithm ry/by#: r ea dy /bu sy# the ry/by# is a dedicated, open-drain output pin which indicates whether an embedded algo - rithm is in progress or complete. the ry/by# status is valid after the rising edge of the final we# pulse in the command sequence. since ry/by# is an open-drain output, several ry/by# pins can be tied together in parallel with a pull-up resistor to v cc . if the output is low (busy), the device is active ly erasing or programming. (this includes program - ming in the erase suspend mode.) if the output is high (ready), the device is in the read mode, the standby mode, or in the erase-suspend-read mode. ta b l e 36 shows the outputs for ry/by#. dq6: toggle bit i toggle bit i on dq6 indicates whether an embedded program or erase algorithm is in progress or complete, or whether the device entered the eras e suspend mode. toggle bit i may be read at any address, and is valid after the rising edge of the final we# pulse in the command sequence (prior to the program or erase operation), and during the sector erase time-out. during an embedded program or erase algorith m operation, successive read cycles to any ad - dress cause dq6 to toggle. the system may use either oe# or ce# to control the read cycles. when the operation is complete, dq6 stops toggling. dq7 = data? yes no no dq5 = 1? no yes yes fail pass read dq15?dq0 addr = va read dq15?dq0 addr = va dq7 = data? start
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 73 data sheet after an erase command sequence is written, if all sectors selected for erasing are protected, dq6 toggles for approximately 100 s, then returns to reading array data. if not all selected sectors are protected, the embedded erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected. the system can use dq6 and dq2 together to dete rmine whether a sector is actively erasing or is erase-suspended. when the device is actively erasing (that is, the embedded erase algorithm is in progress), dq6 toggles. when the device enters the erase suspend mode, dq6 stops tog - gling. however, the system must also use dq2 to determine which sectors are erasing or erase- suspended. alternatively, the system can use dq7 (see the subsection on dq7: data# polling). if a program address falls within a protected sector, dq6 toggles for approximately 1 s after the program command sequence is written, then returns to reading array data. dq6 also toggles during the erase-suspend-pr ogram mode, and stops toggling once the embed - ded program algorithm is complete. ta b l e 36 shows the outputs for toggle bit i on dq6. figure 8 shows the toggle bit algorithm. figure 20 shows the toggle bit timing diagrams. figure 21 shows the differences between dq2 and dq6 in graphical form. also, see dq2: toggle bit ii .
74 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet note: the system should recheck the toggle bit even if dq5 = ?1? because the toggle bit may stop toggling as dq5 changes to ?1.? see the subsections on dq6 and dq2 for more information. figure 8. toggle bit algorithm dq2: toggle bit ii the ?toggle bit ii? on dq2, when used with dq6, indicates whether a particular sector is actively erasing (that is, the embedded erase algorithm is in progress), or whether that sector is erase- suspended. toggle bit ii is valid after the risi ng edge of the final we# pulse in the command sequence. dq2 toggles when the system reads at addresses within those sectors that are selected for era - sure. (the system may use either oe# or ce# to control the read cycles.) but dq2 cannot distinguish whether the sector is actively erasing or is erase-suspended. dq6, by comparison, in - dicates whether the device is actively erasing, or is in erase suspend, but cannot distinguish which sectors are selected for erasure. thus, both status bits are required for sector and mode information. refer to ta b l e 36 to compare outputs for dq2 and dq6. start no yes yes dq5 = 1? no yes toggle bit = toggle? no program/erase operation not complete, write reset command program/erase operation complete read dq7?dq0 toggle bit = toggle? read dq7?dq0 twice read dq7?dq0
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 75 data sheet figure 8 shows the toggle bit algorithm in flowchart form, and the section ?dq2: toggle bit ii? explains the algorithm, also see ry/by#: ready/busy# . figure 20 shows the toggle bit timing di - agram. figure 21 shows the differences between dq2 and dq6 in graphical form. whenever the system initially begins reading togg le bit status, it must read dq7?dq0 at least twice in a row to determine whether a toggle bit is toggling. typically, the system would note and store the value of the toggle bit after the first read. after the second read, the system would com - pare the new value of the toggle bit with the first. if the toggle bit is not toggling, the device has completed the program or erase operation. the sy stem can read array data on dq7?dq0 on the following read cycle. however, if after the initial two read cycles, the system determines that the toggle bit is still tog - gling, the system also should note whether the va lue of dq5 is high (see the section on dq5). if it is, the system should then determine again wh ether the toggle bit is toggling, since the toggle bit may have stopped toggling just as dq5 went hi gh. if the toggle bit is no longer toggling, the device has successfully completed the program or erase operation. if it is still toggling, the device did not completed the operation successfully, an d the system must write the reset command to return to reading array data. the remaining scenario is that the system initially determines that the toggle bit is toggling and dq5 did not go high. the system may continue to monitor the toggle bit and dq5 through suc - cessive read cycles, determining the status as described in the previous paragraph. alternatively, it may choose to perform other system tasks. in this case, the system must start at the beginning of the algorithm when it returns to determine the status of the operation (top of figure 6 ). dq5: exceeded timing limits dq5 indicates whether the program, erase, or writ e-to-buffer time exceeded a specified internal pulse count limit. under these conditions dq5 produc es a ?1,? indicating that the program or erase cycle was not successfully completed. the device may output a ?1? on dq5 if the system tries to program a ?1? to a location that was previously programmed to ?0.? only an erase operation can change a ?0? back to a ?1.? under this condition, the device halts the operat ion, and when the timing limit is exceeded, dq5 produces a ?1.? in all these cases, the system must write the re set command to return the device to the reading the array (or to erase-suspend-read if the device was previously in the erase-suspend-program mode). dq3: sector erase timer after writing a sector erase command sequence, the system may read dq3 to determine whether or not erasure started. (the sector erase timer does not apply to the chip erase command.) if additional sectors are selected for erasure, the entire time-out also applies after each additional sector erase command. when the time-out period is complete, dq3 switches from a ?0? to a ?1.? if the time between additional sector erase commands from the system can be assumed to be less than 50 s, the system need not monitor dq3( see sector erase command sequence ). after the sector erase command is written, the syst em should read the status of dq7 (data# poll - ing) or dq6 (toggle bit i) to ensure that the device accepted the command sequence, and then reads dq3. if dq3 is ?1,? the embedded erase algorithm started; all further commands (except erase suspend) are ignored until the erase operation is complete. if dq3 is ?0,? the device accepts additional sector erase commands. to ensure the command was accepted, the system software should check the status of dq3 prior to and following each subsequent sector erase command. if dq3 is high on the second status check, the last command might not have been accepted. ta b l e 36 shows the status of dq3 relative to the other status bits. dq1: write-to-buffer abort dq1 indicates whether a write-to-buffer operatio n was aborted. under these conditions dq1 pro - duces a ?1?. the system must issue the write-to-buffer-abort-reset command sequence to return the device to reading array data. see write buffer for more details.
76 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet notes: 1. dq5 switches to ?1? when an embedded program, embedded erase, or write-to-buffer operation exceeded the maximum timing limits. refer to the section on dq5 for more information. 2. dq7 and dq2 require a valid address when readin g status information. refer to the appropriate subsection for further details. 3. the data# polling algorithm should be used to monitor the last loaded write-buffer address location. 4. dq1 switches to ?1? when the device aborts the write-to-buffer operation ta b l e 3 6 . write operation status status dq7 ( note 2 ) dq6 dq5 ( note 1 ) dq3 dq2 ( note 2 ) dq1 ry/by# standar d mode embedded program algorithm dq7# toggle 0 n/a no toggle 0 0 embedded erase algorithm 0toggle 0 1togglen/a0 program suspend mode program- suspend read program-suspended sector invalid (not allowed) 1 non-program suspended sector data 1 erase suspend mode erase- suspend read erase-suspended sector 1 no toggle 0 n/a toggle n/a 1 non-erase suspended sector data 1 erase-suspend-program (embedded program) dq7# toggle 0 n/a n/a n/a 0 write- to- buffer busy ( note 3 ) dq7# toggle 0 n/a n/a 0 0 abort ( note 4 ) dq7# toggle 0 n/a n/a 1 0
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 77 data sheet absolute maximum ratings notes: 1. minimum dc voltage on input or i/os is ?0.5 v. during voltage transitions, inputs or i/os may overshoot v ss to ?2.0 v for periods of up to 20 ns. see figure 9, maximum negative overshoot waveform . maximum dc voltage on input or i/os is v cc + 0.5 v. during voltage transitions, input or i/o pins may overshoot to v cc + 2.0 v for periods up to 20 ns. see figure 10 . 2. minimum dc input voltage on pins a9, oe#, acc, and reset# is ?0.5 v. during voltage transitions, a9, oe#, acc, and reset# may overshoot v ss to ?2.0 v for periods of up to 20 ns. see figure 9 . maximum dc input voltage on pin a9, oe#, acc, and reset# is +12.5 v which may overshoot to +14.0v for periods up to 20 ns. 3. no more than one output may be shorted to ground at a time. duration of the short circuit should not be greater than one seco nd. 4. stresses above those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. this is a stress ratin g only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this d ata sheet is not implied. exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability. figure 9. maximum negative overshoot waveform figure 10. maximum positive overshoot waveform operating ranges note: operating ranges define those limits between whic h the functionality of the device is guaranteed. storage temperature, plastic packages ?65c to +150c ambient temperature with power applied ?65c to +125c voltage with respect to ground v cc ( note 1 ) ?0.5 v to +4.0 v a9, oe#, acc and reset# ( note 2 ) ?0.5 v to +12.5 v all other pins ( note 1 ) ?0.5 v to v cc +0.5 v output short circuit current ( note 3 ) 200 ma ambient temperature (t a ) industrial (i) devices ?40c to +85c supply voltages v cc for full voltage range +2.7 v to +3.6 v v cc for regulated voltage range +3.0 v to +3.6 v v io v cc 20 ns 20 ns +0.8 v ?0.5 v 20 ns ?2.0 v 20 ns 20 ns v cc +2.0 v v cc +0.5 v 20 ns 2.0 v
78 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet dc characteristics cmos compatible notes: 1. on the wp#/acc pin only, the maximum input load current when wp# = v il is 5.0 a. 2. the i cc current listed is typically less than 3.5 ma/mhz, with oe# at v ih . 3. maximum i cc specifications are tested with v cc = v cc max. 4. s29gl032m, s29gl064m 5. s29gl128m, s29gl256m 6. i cc active while embedded erase or embedded program is in progress. 7. automatic sleep mode enable s the low power mode when ad dresses remain stable for t acc + 30 ns. 8. v cc voltage requirements. 9. not 100% tested. parameter symbol parameter description (notes) test conditions min typ max uni t i li input load current ( 1 ) v in = v ss to v cc , v cc = v cc max 1.0 a i lit a9, acc input load current v cc = v cc max ; a9 = 12.5 v 35 a i lr reset leakage current v cc = v cc max ; reset# = 12.5 v 35 a i lo output leakage current v out = v ss to v cc , v cc = v cc max 1.0 a i cc1 v cc initial read current ( 2 , 3 ) ce# = v il, oe# = v ih 1 mhz 520 ma 5 mhz (4) 18 25 5 mhz (5) 25 35 10 mhz (4) 35 50 10 mhz (5) 40 60 i cc2 v cc intra-page read current ( 2 , 3 ) ce# = v il, oe# = v ih 10 mhz 520 ma 40 mhz 10 40 i cc3 v cc active write current ( 3 , 4 ) ce# = v il, oe# = v ih 50 60 ma i cc4 v cc standby current ( 3 ) ce#, reset# = v cc 0.3 v, wp# = v ih 15a i cc5 v cc reset current ( 3 ) reset# = v ss 0.3 v, wp# = v ih 15a i cc6 automatic sleep mode ( 3 , 7 ) v ih = v cc 0.3 v; -0.1< v il 0.3 v, wp# = v ih 15a v il input low voltage ( 1 , 8 ) ?0.5 0.8 v v ih input high voltage 1 , 8 ) 0.7 v cc v cc + 0.5 v v hh voltage for acc program acceleration v cc = 2.7 ?3.6 v 11.5 12.0 12.5 v v id voltage for autoselect and temporary sector unprotect v cc = 2.7 ?3.6 v 11.5 12.0 12.5 v v ol output low voltage ( 8 ) i ol = 4.0 ma, v cc = v cc min 0.45 v v oh1 output high voltage i oh = ?2.0 ma, v cc = v cc min 0.85 v cc v v oh2 i oh = ?100 a, v cc = v cc min v cc ?0.4 v v lko low v cc lock-out voltage ( 9 ) 2.3 2.5 v
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 79 data sheet test conditions note: diodes are in3064 or equivalent figure 11. te s t s e t u p key to switching waveforms figure 12. input waveforms and measurement levels ta b l e 3 7 . test specifications test condition all speeds unit output load 1 ttl gate output load capacitance, c l (including jig capacitance) 30 pf input rise and fall times 5ns input pulse levels 0.0 or v cc v input timing measurement reference levels (see note) 0.5 v cc v output timing measurement reference levels 0.5 v cc v waveform inputs outputs steady changing from h to l changing from l to h don?t care, any change permitted changing, state unknown does not apply center line is high impedance state (high z) 2.7 k c l 6.2 k 3.3 v device under te s t v cc 0.0 v output measurement level input 0.5 v cc 0.5 v cc
80 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics read-only operations?s29gl256m only notes: 1. not 100% tested. 2. see figure 11 and table 37 for test specifications. read-only operations?s29gl128m only notes: 1. not 100% tested. 2. see figure 11 and table 37 for test specifications. parameter description test setup speed options unit jedec std. 10 11 t avav t rc read cycle time (note 1) min 100 100 ns t avqv t acc address to output delay ce#, oe# = v il max 100 100 ns t elqv t ce chip enable to output delay oe# = v il max 100 100 ns t pacc page access time max 30 30 ns t glqv t oe output enable to output delay max 30 30 ns t ehqz t df chip enable to output high z (note 1) max 16 ns t ghqz t df output enable to output high z (note 1) max 16 ns t axqx t oh output hold time from addresses, ce# or oe#, whichever occurs first min 0 ns t oeh output enable hold time (note 1) read min 0 ns toggle and data# polling min 10 ns parameter description test setup speed options unit jedec std. 90 10 t avav t rc read cycle time (note 1) min 90 100 ns t avqv t acc address to output delay ce#, oe# = v il max 90 100 ns t elqv t ce chip enable to output delay oe# = v il max 90 100 ns t pacc page access time max 25 30 ns t glqv t oe output enable to output delay max 25 30 ns t ehqz t df chip enable to output high z (note 1) max 16 ns t ghqz t df output enable to output high z (note 1) max 16 ns t axqx t oh output hold time from addresses, ce# or oe#, whichever occurs first min 0 ns t oeh output enable hold time (note 1) read min 0 ns toggle and data# polling min 10 ns
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 81 data sheet read-only operations?s29gl064m only note: not 100% tested. parameter description test setup speed options unit jedec std. 90 10 11 t avav t rc read cycle time (note 1) min 90 100 110 ns t avqv t acc address to output delay ce#, oe# = v il max 90 100 110 ns t elqv t ce chip enable to output delay oe# = v il max 90 100 110 ns t pacc page access time max 25 30 30 ns t glqv t oe output enable to output delay max 25 30 30 ns t ehqz t df chip enable to output high z ( see note ) max 16 ns t ghqz t df output enable to output high z ( see note ) max 16 ns t axqx t oh output hold time from addresses, ce# or oe#, whichever occurs first min 0 ns t oeh output enable hold time ( see note ) read min 0 ns toggle and data# polling min 10 ns
82 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics read-only operations?s29gl032m only notes: 1. not 100% tested. 2. see figure 11 and table 37 for test specifications. figure 13. read operation timings parameter description test setup speed options unit jedec std. 90 10 11 t avav t rc read cycle time ( note 1 ) min 90 100 110 ns t avqv t acc address to output delay ce#, oe# = v il max 90 100 110 ns t elqv t ce chip enable to output delay oe# = v il max 90 100 110 ns t pacc page access time max 25 30 30 ns t glqv t oe output enable to output delay max 25 30 30 ns t ehqz t df chip enable to output high z (note 1) max 16 ns t ghqz t df output enable to output high z (note 1) max 16 ns t axqx t oh output hold time from addresses, ce# or oe#, whichever occurs first min 0 ns t oeh output enable hold time (note 1) read min 0 ns toggle and data# polling min 10 ns t oh t ce outputs we# addresses ce# oe# high z output valid high z addresses stable t rc t acc t oeh t rh t oe t rh 0 v ry/by# reset# t df
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 83 data sheet ac characteristics note: figure shows device in word mode. addresses are a1?a-1 for byte mode. figure 14. page read timings hardware reset (reset#) note: not 100% tested. parameter description all speed options unit jedec std. t ready reset# pin low (during embedded algorithms) to read mode (see note) max 20 s t ready reset# pin low (not during em bedded algorithms) to read mode (see note) max 500 ns t rp reset# pulse width min 500 ns t rh reset high time before read (see note) min 50 ns t rpd reset# input low to standby mode (see note) min 20 s t rb ry/by# output high to ce#, oe# pin low min 0 ns a23 - a2 ce# oe# a1 - a0* data bus same page aa ab ac ad qa qb qc qd t acc t pac c t pac c t pac c
84 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics figure 15. reset timings reset# ry/by# ry/by# t rp t ready reset timings not during embedded algorithms t ready ce#, oe# t rh ce#, oe# reset timings during embedded algorithms reset# t rp t rb t rh
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 85 data sheet ac characteristics erase and program operations?s29gl256m only notes: 1. not 100% tested. 2. see erase and programming performance for more information. 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume comman d is written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 16 . parameter description speed options unit jedec std. 10 11 t avav t wc write cycle time (note 1) min 100 110 ns t avwl t as address setup time min 0 ns t aso address setup time to oe# lo w during toggle bit polling min 15 ns t wlax t ah address hold time min 45 ns t aht address hold time from ce# or oe# high during toggle bit polling min 0 ns t dvwh t ds data setup time min 45 ns t whdx t dh data hold time min 0 ns t ceph ce# high during toggle bit polling min 20 ns t oeph oe# high during toggle bit polling min 20 ns t ghwl t ghwl read recovery time before write (oe# high to we# low) min 0 ns t elwl t cs ce# setup time min 0 ns t wheh t ch ce# hold time min 0 ns t wlwh t wp write pulse width min 35 ns t whdl t wph write pulse width high min 30 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 24 0 s single word program operation (note 2) typ 60 accelerated single word program operation (note 2) typ 54 t whwh2 t whwh2 sector erase operation (note 2) typ 0.5 sec t vhh v hh rise and fall time (note 1) min 250 ns t vcs v cc setup time (note 1) min 50 s t busy we# high to ry/by# low max 100 110 ns t poll program valid before status polling max 4 s
86 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics erase and program operations?s29gl128m only notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 16 . parameter description speed options uni t jedec std. 90 10 t avav t wc write cycle time (note 1) min 90 100 ns t avwl t as address setup time min 0 ns t aso address setup time to oe# low during toggle bit polling min 15 ns t wlax t ah address hold time min 45 ns t aht address hold time from ce# or oe# high during toggle bit polling min 0 ns t dvwh t ds data setup time min 45 ns t whdx t dh data hold time min 0 ns t ceph ce# high during toggle bit polling min 20 ns t oeph oe# high during toggle bit polling min 20 ns t ghwl t ghwl read recovery time before write (oe# high to we# low) min 0 ns t elwl t cs ce# setup time min 0 ns t wheh t ch ce# hold time min 0 ns t wlwh t wp write pulse width min 35 ns t whdl t wph write pulse width high min 30 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 240 s single word program operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 .5 s ec t vhh v hh rise and fall time (note 1) min 250 ns t vcs v cc setup time (note 1) min 50 s t busy we# high to ry/by# low max 90 100 ns t poll program valid before status polling max 4 s
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 87 data sheet ac characteristics erase and program operations?s29gl064m only notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 16 . parameter description speed options unit jedec std. 90 10 11 t avav t wc write cycle time (note 1) min 90 100 110 ns t avwl t as address setup time min 0 ns t aso address setup time to oe# lo w during toggle bit polling min 15 ns t wlax t ah address hold time min 45 ns t aht address hold time from ce# or oe # high during toggle bit polling min 0 ns t dvwh t ds data setup time min 35 ns t whdx t dh data hold time min 0 ns t ceph ce# high during toggle bit polling min 20 ns t oeph oe# high during toggle bit polling min 20 ns t ghwl t ghwl read recovery time before write (oe# high to we# low) min 0 ns t elwl t cs ce# setup time min 0 ns t wheh t ch ce# hold time min 0 ns t wlwh t wp write pulse width min 35 ns t whdl t wph write pulse width high min 30 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 240 s single word program operation (note 2) typ 60 accelerated single word program operation (note 2) typ 54 t whwh2 t whwh2 sector erase operation (note 2) typ 0.5 sec t vhh v hh rise and fall time (note 1) min 250 ns t vcs v cc setup time (note 1) min 50 s t busy we# high to ry/by# low max 90 100 110 ns t poll program valid before status polling max 4 s
88 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics erase and program operations?s29gl032m only notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. effective write buffer specific ation is based upon a 16-word/ 32-byte write buffer operation. 5. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 16 . parameter description speed options unit jedec std. 90 10 11 t avav t wc write cycle time (note 1) min 90 100 110 ns t avwl t as address setup time min 0 ns t aso address setup time to oe# lo w during toggle bit polling min 15 ns t wlax t ah address hold time min 45 ns t aht address hold time from ce# or oe # high during toggle bit polling min 0 ns t dvwh t ds data setup time min 35 ns t whdx t dh data hold time min 0 ns t ceph ce# high during toggle bit polling min 20 ns t oeph oe# high during toggle bit polling min 20 ns t ghwl t ghwl read recovery time before write (oe# high to we# low) min 0 ns t elwl t cs ce# setup time min 0 ns t wheh t ch ce# hold time min 0 ns t wlwh t wp write pulse width min 35 ns t whdl t wph write pulse width high min 30 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 240 s single word program operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 .5 s ec t vhh v hh rise and fall time (note 1) min 250 ns t vcs v cc setup time (note 1) min 50 s t busy we# high to ry/by# low max 90 100 110 ns t poll program valid before status polling max 4 s
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 89 data sheet ac characteristics notes: 1. pa = program address, pd = program data, d out is the true data at the program address. 2. illustration shows device in word mode. figure 16. program operation timings figure 17. accelerated program timing diagram oe# we# ce# v cc data addresses t ds t ah t dh t wp pd t whwh1 t wc t as t wph t vcs 555h pa pa read status data (last two cycles) a0h t poll t cs status d out ry/by# t rb t busy t ch pa program command sequence (last two cycles) acc t vhh v hh v il or v ih v il or v ih t vhh acc t vhh v hh v il or v ih v il or v ih t vhh
90 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics notes: 1. sa = sector address (for sector erase), va = valid address for reading status data ( see write operation status ). 2. illustration shows device in word mode. figure 18. chip/sector erase operation timings note: va = valid address. illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle. figure 19. data# polling timings (during embedded algorithms) oe# ce# addresses v cc we# data 2aah sa t ah t wp t wc t as t wph 555h for chip erase 10 for chip erase 30h t ds t vcs t cs t dh 55h t ch in progress complete t whwh2 va va erase command sequence (last two cycles) read status data ry/by# t rb t busy we# ce# oe# high z t oe high z dq7 dq0?dq6 ry/by# t busy complement tr u e addresses va t ch va va status data complement status data tr u e valid data valid data t poll t acc t ce t oeh t df t oh t rc
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 91 data sheet ac characteristics note: va = valid address; not required for dq6. illustration shows first two status cycle after command sequence, last status read cycle, and array data read cycle. figure 20. toggle bit timings (during embedded algorithms) note: dq2 toggles only when read at an address within an erase-suspended sector. the system may use oe# or ce# to toggle dq2 and dq6. figure 21. dq2 vs. dq6 temporary sector unprotect note: not 100% tested. parameter description all speed options jedec std unit t vidr v id rise and fall time (see note) min 500 ns t rsp reset# setup time for temporary sector unprotect min 4 s oe# ce# we# addresses t oeh t dh t aht t aso t oeph t oe valid data (first read) (second read) (stops toggling) t ceph t aht t as dq6 / dq2 valid data valid status valid status valid status ry/by# enter erase erase erase enter erase suspend program erase suspend read erase suspend read erase we# dq6 dq2 erase complete erase suspend suspend program resume embedded erasing
92 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet ac characteristics figure 22. temporary sector group unprotect timing diagram note: for sector group protect, a6:a0 = 0xx0010. for sector group unprotect, a6:a0 = 1xx0010. figure 23. sector group protect and unprotect timing diagram reset# t vidr v id v ss , v il , or v ih v id v ss , v il , or v ih ce# we# ry/by# t vidr t rsp program or erase command sequence t rrb sector group protect: 150 s, sector group unprot ect: 15 ms 1 s reset# sa, a6, a3, a2, a1, a0 data ce# we# oe# 60h 60h 40h valid* valid* valid* status sector group protect or unprotect verify v id v ih
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 93 data sheet alternate ce# controlled erase and program operations?s29gl256m notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resume (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 24 . parameter description speed options unit jedec std. 10 11 t avav t wc write cycle time (note 1) min 100 110 ns t avwl t as address setup time min 0 ns t elax t ah address hold time min 45 ns t dveh t ds data setup time min 45 ns t ehdx t dh data hold time min 0 ns t ghel t ghel read recovery time before write (oe# high to we# low) min 0 ns t wlel t ws we# setup time min 0 ns t ehwh t wh we# hold time min 0 ns t eleh t cp ce# pulse width min 35 ns t ehel t cph ce# pulse width high min 25 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 240 s single word progra m operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 . 5 se c t rh reset# high time before write min 50 ns t poll program valid before status polling max 4 s
94 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet alternate ce# controlled erase and program operations?s29gl128m notes: 1. not 100% tested. 2. see see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 24 . parameter description speed options unit jedec std. 10 11 t avav t wc write cycle time (note 1) min 100 110 ns t avwl t as address setup time min 0 ns t elax t ah address hold time min 45 ns t dveh t ds data setup time min 45 ns t ehdx t dh data hold time min 0 ns t ghel t ghel read recovery time before write (oe# high to we# low) min 0 ns t wlel t ws we# setup time min 0 ns t ehwh t wh we# hold time min 0 ns t eleh t cp ce# pulse width min 35 ns t ehel t cph ce# pulse width high min 25 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) typ 240 s single word program operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 .5 s ec t rh reset# high time before write min 50 ns t poll program valid before status polling (note 4) max 4 s
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 95 data sheet alternate ce# controlled erase and program operations?s29gl064m notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 24 . parameter description speed options unit jedec std. 90 10 11 t avav t wc write cycle time (note 1) min 90 100 110 ns t avwl t as address setup time min 0 ns t elax t ah address hold time min 45 ns t dveh t ds data setup time min 35 ns t ehdx t dh data hold time min 0 ns t ghel t ghel read recovery time before write (oe# high to we# low) min 0 ns t wlel t ws we# setup time min 0 ns t ehwh t wh we# hold time min 0 ns t eleh t cp ce# pulse width min 35 ns t ehel t cph ce# pulse width high min 25 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) ty p 2 4 0 s single word program operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 . 5 s ec t rh reset# high time before write min 50 ns t poll program valid before status polling (note 5) max 4 s
96 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet alternate ce# controlled erase and program operations?s29gl032m notes: 1. not 100% tested. 2. see erase and programming performance for more information 3. for 1?16 words/1?32 bytes programmed. 4. if a program suspend command is issued within t poll , the device requires t poll before reading status data, once programming resumes (that is, the program resume command has been written). if the suspend command was issued after t poll , status data is available immediately after programming resumes. see figure 24 . parameter description speed options unit jedec std. 90 10 11 t avav t wc write cycle time (note 1) min 90 100 110 ns t avwl t as address setup time min 0 ns t elax t ah address hold time min 45 ns t dveh t ds data setup time min 35 ns t ehdx t dh data hold time min 0 ns t ghel t ghel read recovery time before write (oe# high to we# low) min 0 ns t wlel t ws we# setup time min 0 ns t ehwh t wh we# hold time min 0 ns t eleh t cp ce# pulse width min 35 ns t ehel t cph ce# pulse width high min 25 ns t whwh1 t whwh1 write buffer program operation (notes 2, 3) ty p 2 4 0 s single word program operation (note 2) ty p 6 0 accelerated single word program operation (note 2) ty p 5 4 t whwh2 t whwh2 sector erase operation (note 2) ty p 0 . 5 s ec t rh reset# high time before write min 50 ns t poll program valid before status polling (note 4) max 4 s
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 97 data sheet notes: 1. figure indicates last two bus cycles of a program or erase operation. 2. pa = program address, sa = sector address, pd = program data. 3. dq7# is the complement of the data written to the device. d out is the data written to the device. 4. illustration shows device in word mode. figure 24. alternate ce# controlled write (erase/program) operation timings t ghel t ws oe# ce# we# reset# t ds data t ah addresses t dh t cp dq7# d out t wc t as t cph pa data# polling pbd for program 55 for erase t rh t whwh1 or 2 t poll ry/by# t wh 29 for program buffer to flash 30 for sector erase 10 for chip erase pba for program 2aa for erase sa for program buffer to flash sa for sector erase 555 for chip erase t busy
98 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet erase and programming performance notes: 1. typical program and erase times as sume the following conditions: 25 c, v cc = 3.0v, 10,000 cycles; checkerboard data pattern. 2. under worst case conditions of 90 c; worst case v cc , 100,000 cycles. 3. effective programming time (typ) is 15 s (per word), 7.5 s (per byte). 4. effective accelerated programming time (typ) is 12.5 s (per word), 6.3 s (per byte). 5. effective write buffer specificat ion is calculated on a per-word/per-byte basis for a 16-word/32- byte write buffer operation. 6. in the pre-programming step of the embedded erase algorithm, all bits are programmed to 00h before erasure. 7. system-level overhead is the time required to execute the command sequence(s) for the program command. see table 34 and table 35 for further information on command definitions. tsop pin and bga package capacitance for package types ta, tf, ba, bf, fa, ff (refer to ordering information pages): for package types tb, tc, bb, bc, (refer to ordering information pages): notes: 1. sampled, not 100% tested. 2. test conditions t a = 25c, f = 1.0 mhz. parameter (notes) typ ( note 1 ) max ( note 2 ) unit comments sector erase time 0.5 3.5 sec excludes 00h programming prior to erasure ( note 6 ) chip erase time s29gl032m 32 64 sec s29gl064m 64 128 s29gl128m 128 256 s29gl256m 256 512 total write buffer program time ( 3 , 5 ) 240 s excludes system level overhead ( note 7 ) total accelerated effective write buffer program time ( 4 , 5 ) 200 s chip program time s29gl032m 31.5 sec s29gl064m 63 s29gl128m 126 s29gl256m 252 parameter symbol parameter description test setup typ max unit c in input capacitance v in = 0 tsop 6 7.5 pf bga 4.2 5.0 pf c out output capacitance v out = 0 tsop 8.5 12 pf bga 5.4 6.5 pf c in2 control pin capacitance v in = 0 tsop 7.5 9 pf bga 3.9 4.7 pf parameter symbol parameter description test setup typ max unit c in input capacitance v in = 0 tsop 8 10 pf bga 8 10 pf c out output capacitance v out = 0 tsop 8.5 12 pf bga 8.5 12 pf c in2 control pin capacitance v in = 0 tsop 8 10 pf bga 8 10 pf c in3 reset# and wp#/acc pin capacitance v in = 0 tsop 20 25 pf bga 15 20 pf
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 99 data sheet physical dimensions ts040?40-pin standard thin small outline package (tsop) dwg rev aa; 10/99
100 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet physical dimensions tsr040?40-pin standard and reverse thin small outline package (tsop) -x- x = a or b e/2 detail b c l 0.25mm (0.0098") bsc 0? detail a r gage line parallel to seating plane b b1 (c) 7 6 c1 with plating base metal 7 c a-b s m 0.08mm (0.0031") section b-b e 0.10 c a2 plane seating c a1 see detail b see detail b b b b b see detail a see detail a 2 reverse pin out (top view) 2 n +1 n n 1 4 3 a -a- -b- 5 9 e 5 d1 d 6 2 3 4 5 7 8 9 tsr 040 mo-142 (b) ec 40 min 0.05 0.95 0.17 0.17 0.10 0.10 18.30 19.80 0.50 0? 0.08 9.90 0.50 basic max 0.15 1.20 0.27 0.16 0.21 5? 0.20 18.50 10.10 0.70 20.20 0.23 1.05 0.20 1.00 0.22 18.40 20.00 0.60 3? 10.00 nom symbol jedec package b1 a2 a1 a d l e e d1 b c1 c 0 r n 1 notes: controlling dimensions are in millimeters (mm). (dimensioning and tolerancing conforms to ansi y14.5m-1982) not applicable. pin 1 identifier for reverse pin out (die down), ink or laser mark. to be determined at the seating plane -c- . the seating plane is defined as the plane of contact that is made when the package leads are allowed to rest freely on a flat horizontal surface. dimensions d1 and e do not include mold protrusion. allowable mold protusion is 0.15mm (.0059") per side. dimension b does not include dambar protusion. allowable dambar protusion shall be 0.08 (0.0031") total in excess of b dimension at max. material condition. minimum space between protrusion and an adjacent lead to be 0.07 (0.0028"). these dimensions apply to the flat section of the lead between 0.10mm (.0039") and 0.25mm (0.0098") from the lead tip. lead coplanarity shall be within 0.10mm (0.004") as measured from the seating plane. dimension "e" is measured at the centerline of the leads. 3324 \ 16-038.10a
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 101 data sheet physical dimensions ts048?48-pin standard and reverse thin small outline package (tsop) -x- x = a or b e/2 detail b c l 0.25mm (0.0098") bsc 0? detail a r gage line parallel to seating plane b b1 (c) 7 6 c1 with plating base metal 7 c a-b s m 0.08mm (0.0031") section b-b e 0.10 c a2 plane seating c a1 see detail b see detail b b b b b see detail a see detail a 2 standard pin out (top view) 2 n +1 n n 1 4 2 a -a- -b- 5 9 e 5 d1 d 6 2 3 4 5 7 8 9 ts 048 mo-142 (b) ec 48 min 0.05 0.95 0.17 0.17 0.10 0.10 18.30 19.80 0.50 0? 0.08 11.90 0.50 basic max 0.15 1.20 0.27 0.16 0.21 5? 0.20 18.50 12.10 0.70 20.20 0.23 1.05 0.20 1.00 0.22 18.40 20.00 0.60 3? 12.00 nom symbol jedec package b1 a2 a1 a d l e e d1 b c1 c 0 r n 1 notes: controlling dimensions are in millimeters (mm). (dimensioning and tolerancing conforms to ansi y14.5m-1982) pin 1 identifier for standard pin out (die up). not applicable. to be determined at the seating plane -c- . the seating plane is defined as the plane of contact that is made when the package leads are allowed to rest freely on a flat horizontal surface. dimensions d1 and e do not include mold protrusion. allowable mold protusion is 0.15mm (.0059") per side. dimension b does not include dambar protusion. allowable dambar protusion shall be 0.08 (0.0031") total in excess of b dimension at max. material condition. minimum space between protrusion and an adjacent lead to be 0.07 (0.0028"). these dimensions apply to the flat section of the lead between 0.10mm (.0039") and 0.25mm (0.0098") from the lead tip. lead coplanarity shall be within 0.10mm (0.004") as measured from the seating plane. dimension "e" is measured at the centerline of the leads. 3325 \ 16-038.10a
102 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet physical dimensions tsr048?48-pin standard and reverse thin small outline package (tsop) -x- x = a or b e/2 detail b c l 0.25mm (0.0098") bsc 0? detail a r gage line parallel to seating plane b b1 (c) 7 6 c1 with plating base metal 7 c a-b s m 0.08mm (0.0031") section b-b e 0.10 c a2 plane seating c a1 see detail b see detail b b b b b see detail a see detail a 2 reverse pin out (top view) 2 n +1 n n 1 4 3 a -a- -b- 5 9 e 5 d1 d 6 2 3 4 5 7 8 9 tsr 048 mo-142 (b) ec 48 min 0.05 0.95 0.17 0.17 0.10 0.10 18.30 19.80 0.50 0? 0.08 11.90 0.50 basic max 0.15 1.20 0.27 0.16 0.21 5? 0.20 18.50 12.10 0.70 20.20 0.23 1.05 0.20 1.00 0.22 18.40 20.00 0.60 3? 12.00 nom symbol jedec package b1 a2 a1 a d l e e d1 b c1 c 0 r n 1 notes: controlling dimensions are in millimeters (mm). (dimensioning and tolerancing conforms to ansi y14.5m-1982) not applicable. pin 1 identifier for reverse pin out (die down), ink or laser mark. to be determined at the seating plane -c- . the seating plane is defined as the plane of contact that is made when the package leads are allowed to rest freely on a flat horizontal surface. dimensions d1 and e do not include mold protrusion. allowable mold protusion is 0.15mm (.0059") per side. dimension b does not include dambar protusion. allowable dambar protusion shall be 0.08 (0.0031") total in excess of b dimension at max. material condition. minimum space between protrusion and an adjacent lead to be 0.07 (0.0028"). these dimensions apply to the flat section of the lead between 0.10mm (.0039") and 0.25mm (0.0098") from the lead tip. lead coplanarity shall be within 0.10mm (0.004") as measured from the seating plane. dimension "e" is measured at the centerline of the leads. 3326 \ 16-038.10a
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 103 data sheet physical dimensions ts056/tsr056?56-pin standard and reve rse thin small outline package (tsop) notes: 1 controlling dimensions are in millimeters (mm). (dimensioning and tolerancing conforms to ansi y14.5m-1982.) 2 pin 1 identifier for standard pin out (die up). 3 pin 1 identifier for reverse pin out (die down), ink or laser mark. 4 to be determined at the seating plane -c- . the seating plane is defined as the plane of contact that is made when the package leads are allowed to rest freely on a flat horizontal surface. 5 dimensions d1 and e do not include mold protrusion. allowable mold protusion is 0.15 mm per side. 6 dimension b does not include dambar protusion. allowable dambar protusion shall be 0.08 mm total in excess of b dimension at max material condition. minimum space between protrusion and an adjacent lead to be 0.07 mm. 7 these dimesions apply to the flat section of the lead between 0.10 mm and 0.25 mm from the lead tip. 8. lead coplanarity shall be within 0.10 mm as measured from the seating plane. 9 dimension "e" is measured at the centerline of the leads. 3160\38.10a mo-142 (b) ec ts/tsr 56 nom. --- --- 1.00 1.20 0.15 1.05 max. --- min. 0.95 0.20 0.23 0.17 0.22 0.27 0.17 --- 0.16 0.10 --- 0.21 0.10 20.00 20.20 19.90 14.00 14.10 13.90 0.60 0.70 0.50 3? 5? 0? --- 0.20 0.08 56 18.40 18.50 18.30 0.05 0.50 basic e r b1 jedec package symbol a a2 a1 d1 d c1 c b e l n o
104 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet physical dimensions laa064?64-ball fortified ball grid array (fbga)
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 105 data sheet physical dimensions lac064?64-pin 18 x 12 mm package 3243 \ 16-038.12d package lac 064 jedec n/a 18.00 mm x 12.00 mm package symbol min nom max note a --- --- 1.40 profile height a1 0.40 --- --- standoff a2 0.60 --- --- body thickness d 18.00 bsc. body size e 12.00 bsc. body size d1 7.00 bsc. matrix footprint e1 7.00 bsc. matrix footprint md 8 matrix size d direction me 8 matrix size e direction n 64 ball count b 0.50 0.60 0.70 ball diameter ed 1.00 bsc. ball pitch - d direction ee 1.00 bsc. ball pitch - e direction sd / se 0.50 bsc. solder ball placement none depopulated solder balls notes: 1. dimensioning and tolerancing per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jesd 95-1, spp-010 (except as noted). 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball row matrix size in the "d" direction. symbol "me" is the ball column matrix size in the "e" direction. n is the total number of solder balls. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row parallel to the d or e dimension, respectively, sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. not used. 9. "+" indicates the theoretical center of depopulated balls. bottom view side view top view 2x 2x c 0.20 c 0.20 6 7 7 a m m c c 0.10 0.25 b c 0.25 0.15 c a b c seating plane ed (ink or laser) corner a1 a2 d e 0.50 a1 corner id. 1.000.5 1.000.5 a a1 corner a1 nx b sd se ee e1 d1 1 2 3 4 5 6 7 8 a cb d fe g h
106 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet physical dimensions fba048?48-pin 6.15 x 8.15 mm package dwg rev af; 10/99
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 107 data sheet physical dimensions fbc048?48-pin 8 x 9 mm package dwg rev af; 10/99
108 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet physical dimensions fbe063?63-pin 12 x 11 mm package dwg rev af; 10/99
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 109 data sheet physical dimensions fpt-48p-m19 fpt-56p-m01 ? .003 +.001 ? 0.08 +0.03 .007 0.17 "a" (stand off height) 0.10(.004) (mounting height) (.472 .008) 12.00 0.20 lead no. 48 25 24 1 (.004 .002) 0.10(.004) m 1.10 +0.10 ? 0.05 +.004 ? .002 .043 0.10 0.05 (.009 .002) 0.22 0.05 (.787 .008) 20.00 0.20 (.724 .008) 18.40 0.20 index 0~8 ? 0.25(.010) 0.50(.020) 0.60 0.15 (.024 .006) details of "a" part * * 18.400.10(.724.004) 20.000.20(.787.008) 14.000.10 m 0.10(.004) 0.100.05 (.004.002) 1 28 56 29 0.08(.003) (.551.004) (stand off) lead no. details of "a" part 0.600.15 (.024.006) 0?~8? .007.001 0.170.03 0.220.05 (.009.002) (mounting height) index "a" .043 ?.002 +.004 ?0.05 +0.10 1.10 0.50(.020) 0.25(.010) * 1 * 2
110 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet revision summary revision a (january 29, 2004) initial release. revision a1 (february 23, 2004) connection diagrams removed 80-ball fine-pitch bga pinout. ordering information added additional packing type. removed frame description fr om package material set. updated valid combinations to reflect the addition of new package type. added marking descriptions to all valid combination tables. word program command sequence and unlock bypass command sequence added these sections. figure 3, write buffer programming operation, figure 4, program operation updated figure. table 34, ?command definitions( x16 mode, byte# = v ih ),? on page 69 updated table. added note 19. table 35, ?command definitions (x8 mode, byte# = v il ),? on page 70 updated table. added note 17. figure 7, data# polling algorithm updated figure. erase and program operations and alternate ce# controlled erase and program operations updated t whwhi description added note 4. program operation timings, chip/sector erase operation timings, toggle bit timings (during embedded algorithms), alternate ce# controlled write (erase/ program) operation timings figures updated figures. physical dimensions removed bga-63p-m02 and bga-80p-m01. added the ts040 package
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 111 data sheet revision a2 (february 25, 2004) connection diagrams removed the 40-pin reverse tsop diagram. updated the 48-pin standard tsop diagram. removed the 48-pin reverse tsop diagram. removed the 56-pin reverse tsop diagram. ordering information removed all references to package type r. autoselect codes, (high voltage method) updated the r3, r4 column replacing -04 and -0 3 designators with -r4 and -r3 respectively. word program co mmand sequence included statements documenting word programming support for backward compatibility with existing flash drivers. physical dimensions removed the bga-80p-m02 diagram. revision a3 (february 26, 2004) distinctive characteristics corrected typo in the flexible se ctor architecture section. revision a4 (march 24, 2004) cmos compatible removed v cc from max for v ol . erase and program operations-s29gl256m only corrected unit typos. erase and program operations-s29gl128m only corrected the minimum data setup time. alternate ce# controlled erase and program operations-s29gl128m corrected the minimum ce# pulse width. tsop pin and bga package capacitance: pkg types tb, tc, bb, bc added c in3. connection diagrams 40-pin standard tsop: co rrected pin 30 to be v io . 48-pin standard tsop: added superscripts to de signators for pin 9, 13, 14, 15 and 47. changed pin 13 to a21. added two notes below illustration. 56-pin standard tsop: added superscripts to desi gnators for pin 1, 2 and 12. changed pin 56 to nc. added three notes below illustration. 64-ball fortified bga: corrected ball d8 to be v io . added superscripts to designators for ball d8, f7, and f1. added two notes below illustration. 63-ball fine-pitch bga: added superscript to designator for ball h7. added one note below illus- tration. added connection diagrams for s29g l064m (model r0) and s29gl032m (model r0). pin description added v io description. logic symbols added v io on all models except r3 and r4. figure 3 write buffer programming operation corrected the dq locations and added callouts to notes one through three.
112 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet dc characteristics corrected test co nditions for i cc6 . revision a5 (april 30, 2004) ordering information - s29gl032m added r5 and r6 model numbers to the breakout table. updated the valid combinations for bga packages table to reflect model numbers r5 and r6. ordering information - s29gl064m revised r8 and r9 model numbers on the breakout table. updated the valid combinations for tsop packages table. ordering information - s29gl0128m added r8 and r9 model numbers to the breakout table. revised the package material set options on the breakout table. updated the valid combinations for tsop packages table. ordering information - s29gl256m revised the package material set options on the breakout table. connection diagrams (56-pin tsop) added a callout to note 3 for pin 15. device geometry definition table revised the data and description information for addresses: 28h/50h and 29h/52h. primary vendor specific extended query table revised the data and description information for addresses: 45h/8ah (x16/x8) revised the data information fo r addresses: 4ch/98h (x16/x8) erase and programmin g performance table revised notes 1 and 2 below the table. revision b0 (may 24, 2004) global converted to full datasheet status. figure 17, autoselect code s, (high voltage method) corrected typos in description. added values for r5, r6, r7 description for cycle 1-3. added r8 and r9 to model number. revision b1 (august 2, 2004) ordering information-s29gl032m added the following temperature range: ?c = commercial (0c to +70c)'. commercial temperature range options added for 90ns speeds. global change s29gl032m, s29gl064m, s29gl128m, s29gl236m ordering options pages: updated note 3 with the following ?...tsops can be packed in types 0 and 3; bgas can be packed in types 0, 2, or 3. revision b2 (september 8, 2004) connection diagram - 64-ball fortified bga modified note 4.
february 7, 2007 s29gl-m_00_b8 s29gl-m mirrorbit tm flash family 113 data sheet logic symbol-s29gl032m (models r3, r4) added models r5 and r6 to the logic symbol. logic symbol-s29gl064m (models r1, r2) added models r8 & r9 to the logic symbol. s29gl032m valid combinations corrected ordering part nu mbers for laa064 packages. physical dimensions renamed the bga-48p-m20 package as the fbg048 package. ordering information added footnotes to indicate tsop pb-free leadframe plating. revision b3 (october 9, 2004) general updated all references to figures, tables, and headings to reflect pa ge number (active link) updated tables 20, 21, and 22 updated tables 24, 25, and 26 s29gl064m valid combination corrected ordering part numbers for ts056 packages s29gl032m sector protection/uprotection address tables corrected table titles s29gl064m sector protection /uprotection address tables corrected table titles primary vendor-specific extended query corrected cfi data at addr ess 48h/90h to be 0001h dc characteristics updated note 2 figure 15, reset timing added t rh revision b4 (january 10, 2005) secured sector flash memory region updated secured silicon sector address table with addresses in x8-mode dc characteristics, cmos compatible corrected wp#/acc input load current footnote document updated cross-refere nces and format. valid combination tables added notes to the 128 mb and 256 mb combination tables. revision b5 (december 13, 2005) added supersession text. corrected typos on connection diagrams and in cfi table.
114 s29gl-m mirrorbit tm flash family s29gl-m_00_b8 february 7, 2007 data sheet revision b6 (october 10, 2006) global deleted fbg048 package from s29gl032m device. ad ded ?retired product? status text to cover page, and first page and ordering information sections of data sheet. revision b7 (january 22, 2007) ac characteristics erase/program operations table, all devices: changed t busy to a maximum specification. revision b8 (february 7, 2007) global updated retired product status text. colophon the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, general office use, personal use, and househol d use, but are not designed, deve loped and manufactured as contem plated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and c ould lead directly to death, personal injury, severe physical damage or other lo ss (i.e., nuclear reaction control in nucle ar facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch co ntrol in weapon system), or (2) for any use where chance of failure is intolerabl e (i.e., submersible repeater and artificial satellite). please note that spansion will not be lia ble to you and/or any third party for any claims or damages ari sing in connection with above-men- tioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, dam age or loss from such failures by incorporating safety design measures in to your facility and equipment such as redu ndancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain re strictions on export under the foreign exchange and foreign trade law of japan, the us export administration regulations or the applicable laws of any oth er country, the prior au- thorization by the respective government entity be required for export of those products. trademarks and notice the contents of this document are subject to change without notice. this document may contain information on a spansion product under development by spansion inc. spansion inc. reserves the right to change or discontinue work on any product without notice. the information in this document is provided as is without warranty or guarantee of any kind as to its ac curacy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty , express, implied, or stat utory. spansion inc. assumes no liability for any damage s of any kind arising out of the use of the information in this document. copyright ? 2004?2007 spansion inc. all ri ghts reserved. spansion, the spansion logo, mirrorbit, or nand, hd-sim, and combinatio ns thereof, are trade- marks of spansion inc. other company and product names used in this publication are for identification purposes only and may be trademarks of their re- spective companies.

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